參數(shù)資料
型號: MAX5181BEEG
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 10-Bit, 40MHz, Current/Voltage-Output DACs
中文描述: PARALLEL, WORD INPUT LOADING, 0.025 us SETTLING TIME, 10-BIT DAC, PDSO24
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-24
文件頁數(shù): 9/16頁
文件大?。?/td> 285K
代理商: MAX5181BEEG
M
10-Bit, 40MHz, Current/Voltage-Output DACs
_______________________________________________________________________________________
9
reference output-current resistor (R
SET
= 9.6k
) sets
I
REF
to 125μA and I
FS
to 1mA.
External Reference
To disable the MAX5181/MAX5184’s internal reference,
connect
REN
to DV
DD
. A temperature-stable, external
reference may now be applied to drive the REFO pin to
set the full-scale output (Figure 3). Choose a reference
capable of supplying at least 150μA to drive the bias
circuit that generates the cascode current for the cur-
rent array. For improved accuracy and drift perfor-
mance, choose a fixed output voltage reference such
as the +1.2V, 25ppm/°C MAX6520 bandgap reference.
Standby Mode
To enter the lower-power standby mode, connect digital
inputs PD and DACEN to DGND. In standby, both the
reference and the control amplifier are active with the
current array inactive. To exit this condition, DACEN
must be pulled high with PD held at DGND. The
MAX5181/MAX5184 typically require 50μs to wake up
and let both outputs and the reference settle.
Shutdown Mode
For lowest power consumption, the MAX5181/MAX5184
provide a power-down mode in which the reference, con-
trol amplifier, and current array are inactive and the DAC
supply current is reduced to 1μA. To enter this mode,
connect PD to DV
DD
. To return to active mode, connect
PD to DGND and DACEN to DV
DD
. About 50μs are
required for the parts to leave shutdown mode and settle
to their outputs’ values prior to shutdown. Table 1 lists the
power-down mode selection.
Timing Information
Figure 4 shows a detailed timing diagram for the
MAX5181/MAX5184. With each high transition of the
clock, the input latch is loaded with the digital value set
by bits D9 through D0. The content of the input latch is
then shifted to the DAC register, and the output up-
dates at the rising edge of the next clock.
Outputs
The MAX5181 output is designed to supply full-scale
output currents of 1mA into 400
loads in parallel with
a capacitive load of 5pF. The MAX5184 features inte-
grated 400
resistors that restore the array current to
proportional, differential voltages of 400mV. These dif-
ferential output voltages can then be used to drive a
balun transformer or a low-distortion, high-speed oper-
ational amplifier to convert the differential voltage into a
single-ended voltage.
R
SET
**
9.6k
I
FS
R
SET
C
COMP
*
REFR
AGND
AGND
DGND
I
REF
REFO
MAX4040
R
SET
+1.2V
BANDGAP
REFERENCE
REN
CURRENT-
SOURCE ARRAY
*COMPENSATION CAPACITOR (C
COMP
= 100nF)
**9.6k
REFERENCE CURRENT-SET RESISTOR
INTERNAL TO MAX5184 ONLY. USE EXTERNAL
R
SET
FOR MAX5181.
OPTIONAL EXTERNAL BUFFER
FOR HEAVIER LOADS
MAX5181
MAX5184
Figure 2. Setting IFS with the Internal +1.2V Reference and the Control Amplifier
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MAX5182BEEI 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube