參數(shù)資料
型號: MAX5175
廠商: Maxim Integrated Products, Inc.
英文描述: Low-Power, Serial, 12-Bit DACs with Force/Sense Voltage Output
中文描述: 低功耗、串行、12位DAC,帶有加載-感應(yīng)電壓輸出
文件頁數(shù): 10/16頁
文件大?。?/td> 255K
代理商: MAX5175
M
Low-Power, S erial, 12-Bit DACs with
Forc e/S ense Voltage Output
10
______________________________________________________________________________________
Detailed Desc ription
The MAX5175/MAX5177 12-bit, serial, voltage-output
DACs operate with a 3-wire serial interface. These
devices include a 16-bit shift register and a double-
buffered input composed of an input register and a
DAC register (see Functional Diagram. In addition, the
negative terminal of the output amplifier is available.
The DACs are designed with an inverted R-2R ladder
network (Figure 1) that produces a weighted voltage
proportional to the reference voltage.
Referenc e Inputs
The reference input accepts both AC and DC values with
a voltage range extending from 0 to V
DD
- 1.4V. The fol-
lowing equation represents the resulting output voltage:
where N is the numeric value of the DAC’s binary input
code (0 to 4095), V
REF
is the reference voltage, and
Gain is the externally set voltage gain. The maximum
output voltage is V
DD
. The reference pin has a mini-
mum impedance of 18k
and is code dependent.
Output Amplifier
The MAX5175/MAX5177’s DAC output is internally
buffered by a precision amplifier with a typical slew rate
of 0.6V/μs. Access to the output amplifier’s inverting
input provides flexibility in output gain setting and sig-
nal conditioning (see Applications Information.
The output amplifier settles to ±0.5LSB from a full-scale
transition within 12μs, when loaded with 5k
in parallel
with 100pF. Loads less than 2k
degrade perfor-
mance.
S hutdown Mode
The MAX5175/MAX5177 feature a software- and hard-
ware-programmable shutdown mode that reduces the
typical supply current to 1μA. Enter shutdown by writing
the appropriate input-control word as shown in Table 1
or by using the hardware shutdown function. In shut-
down mode, the reference input and the amplifier out-
put become high impedance and the serial interface
remains active. Data in the input register is saved,
allowing the MAX5175/MAX5177 to recall the prior out-
put state when returning to normal operation. Exit shut-
down by reloading the DAC register from the shift
register, by simultaneously loading the input and DAC
registers, or by toggling
PDL
. When returning from
shutdown, wait 40μs for the output to settle.
Power-Down Lockout
Power-down lockout disables the software/hardware
shutdown mode. A high-to-low transition on
PDL
brings
the device out of shutdown, returning the output to its
previous state.
Shutdown
Pulling SHDN high while
PDL
is high places the
MAX5175/MAX5177 in shutdown. Pulling SHDN low does
not take the device out of shutdown. A high-to-low transi-
tion on
PDL
or an appropriate command from the serial
data line (see Table 1 for commands) is required to exit
shutdown.
S erial Interfac e
The 3-wire serial interface is compatible with SPI, QSPI
(Figure 2), and MICROWIRE (Figure 3) interface stan-
dards. The 16-bit serial input word consists of two con-
trol bits, 12 bits of data (MSB to LSB), and two sub-bits.
The control bits determine the MAX5175/MAX5177’s
response as outlined in Table 1. The digital inputs are
double buffered, which allows any of the following:
Loading the input register without updating the DAC
register
Updating the DAC register from the input register
Updating the input and DAC registers simultaneously.
V
V
N GAIN
4096
OUT
REF
=
OUT
FB
SHOWN FOR ALL 1s ON DAC
MSB
2R
2R
2R
2R
2R
R
R
R
REF
AGND
Figure 1. Simplified DAC Circuit Diagram
相關(guān)PDF資料
PDF描述
MAX5175AEEE Low-Power, Serial, 12-Bit DACs with Force/Sense Voltage Output
MAX5175BEEE Low-Power, Serial, 12-Bit DACs with Force/Sense Voltage Output
MAX5177BEEE Low-Power, Serial, 12-Bit DACs with Force/Sense Voltage Output
MAX5181 10-Bit, 40MHz, Current/Voltage-Output DACs
MAX5181BEEG 10-Bit, 40MHz, Current/Voltage-Output DACs
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