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參數(shù)資料
| 型號(hào)： | MAX512ESD |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | DAC |
| 英文描述： | Stereo Class-AB Audio Amplifier with Stereo Headphone Drive and I<sup>2</sup>C Control 24-HTSSOP -40 to 85 |
| 中文描述： | SERIAL INPUT LOADING, 70 us SETTLING TIME, 8-BIT DAC, PDSO14 |
| 封裝： | PLASTIC, SOP-14 |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 179K |
| 代理商： | MAX512ESD |
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SDIN
SCLK
CS
Q2
Q1
SC
SB
SA
LC
LB
LA
D7
D6
D5
D4
D3
D2
D1
D0
OPTIONAL
INSTRUCTION
EXECUTED
(CONTROL BYTE)
(DATA BYTE)
Figure 2. MAX512/MAX513 3-Wire Serial-Interface Timing Diagram
M
Low-Cost, Triple, 8-Bit Voltage-Output DACs
with S erial Interfac e
10
______________________________________________________________________________________
Shutdown Mode
When programmed to shutdown mode, the outputs of
DAC A and B go into a high-impedance state. Virtually
no current flows into or out of the buffer amplifiers in
that state. The output of DAC C goes to 0V when shut
down. In shutdown mode, the REF_ inputs are high
impedance (2M
typ) to conserve current drain from
the system reference; therefore, the system reference
does not have to be powered down. The logic output
LOUT remains active in shutdown.
Coming out of shutdown, the DAC outputs return to the
values kept in the registers. The recovery time is equiv-
alent to the DAC settling time.
The –————input is active low. When asserted (Reset
= 0), DACs A and B are set to full scale (FFhex) and
active, while DAC C is set to zero code (00hex) and
active. The 16-bit serial register is cleared to 0000hex.
LOUT is reset to zero.
An active-low chip select (–—) enables the shift register
to receive data from the serial data input. Data is
clocked into the shift register on every rising edge of
the serial clock signal (SCLK). The clock frequency can
be as high as 5MHz.
Data is sent MSB first and can be transmitted in one
16-bit word. The write cycle can be interrupted at any
two 8-bit-wide transfers. After clocking all 16 bits into
the input shift register, the rising edge of –—updates
the DAC outputs, the shutdown status, and the status of
the logic output. Because of their single buffered struc-
ture, DACs cannot be simultaneously updated to differ-
ent digital values.
Table 1. Input Shift Register
*
*
Clocked in last.
**Clocked in first.
Uncommitted Bit
Q2**
Logic Output
Q1
Shut Down DAC C, Active High
SC
Shut Down DAC B, Active High
SB
Shut Down DAC A, Active High
SA
Load Reg DAC C, Active High
LC
Load Reg DAC B, Active High
LB
Load Reg DAC A, Active High
LA
DAC Data Bit 7 (MSB)
B7
DAC Data Bit 6
B6
DAC Data Bit 5
B5
DAC Data Bit 4
B4
DAC Data Bit 3
B3
DAC Data Bit 2
B2
DAC Data Bit 1
B1
DAC Data Bit 0 (LSB)
B0*
D
C
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| MAX512ESD+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 3Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX512ESD+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 3Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX512ESD-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX512MJD | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Low-Cost, Triple, 8-Bit Voltage-Output DACs with Serial Interface |
| MAX513 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述: |
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