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參數(shù)資料
| 型號： | MAX5120-MAX5121 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | +3V/+5V, 12-Bit, Serial Voltage-Output DACs with Internal Reference |
| 中文描述： | 枚3V / 5V的，12位，串行電壓與內(nèi)部基準電壓輸出DAC |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 288K |
| 代理商： | MAX5120-MAX5121 |
S erial Data Output
The contents of the internal shift register are output
serially on DOUT, which allows for daisy-chaining (see
Applications Information of multiple devices as well as
data readback. The MAX5120/MAX5121 may be pro-
grammed to shift data out on DOUT on the serial
clock’s rising edge (Mode 1) or falling edge (Mode 0).
The latter is the default during power-up and provides a
lag of 16 clock cycles, maintaining SPI, QSPI,
MICROWIRE, and PIC16/PIC17 compatibility. In Mode
1, the output data lags DIN by 15.5 clock cycles.
During power-down, DOUT retains its last digital state
prior to shutdown.
User-Programmable Output (UPO)
The UPO feature allows an external device to be con-
trolled through the serial-interface setup (Table 1),
thereby reducing the number of microcontroller I/O
ports required. During power-down, this output will
retain the last digital state before shutdown. With
CLR
pulled low, UPO will reset to the default state after wake
up.
M
+3V /+5V, 12-Bit, S erial Voltage-Output DACs
with Internal Referenc e
______________________________________________________________________________________
13
Table 3. Detailed SSPCON Register Contents
Receive Overflow Detection Bit
Synchronous Serial Port Enable Bit.
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO, and SCI as serial-
port pins.
X
SSPOV
BIT6
BIT7
Clock Polarity Select Bit. CKP = 0 for SPI master-mode selection.
0
0
CKP
SSPM3
BIT4
BIT3
BIT5
1
SSPEN
0
0
SSPM2
SSPM1
BIT2
BIT1
1
SSPM0
BIT0
CONTROL BIT
Write Collision Detection Bit
X
WCOL
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER
(SSPCON)
MAX5120/MAX5121
SETTINGS
Synchronous Serial Port Mode Select Bit. Sets SPI master mode
and selects f
CLK
= f
OSC
/ 16.
X = Don’t care
Table 4. Detailed SSPSTAT Register Contents
X = Don’t care
SPI Clock Edge Select Bit. Data will be transmitted on the rising
edge of the serial clock.
1
CKE
BIT6
Buffer Full Status Bit
BIT7
Update Address
Read/Write Bit Information
Stop Bit
Start Bit
X
X
P
S
BIT4
BIT3
BIT5
Data Address Bit
X
D/A
X
X
R/W
UA
BIT2
BIT1
X
BF
BIT0
CONTROL BIT
SPI Data Input Sample Phase. Input data is sampled at the mid-
dle of the data output time.
0
SMP
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER
(SSPSTAT)
MAX5120/MAX5121
SETTINGS
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5121 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Evaluation Kit for the MAX2430[MAX2430EVKIT ] |
| MAX5121AEEE | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5121AEEE+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5121AEEE+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5121AEEE-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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