參數(shù)資料
型號： MAX5116EEE
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： DAC
英文描述： Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial Interface
中文描述： SERIAL INPUT LOADING, 8 us SETTLING TIME, 8-BIT DAC, PDSO16
封裝： 0.150 INCH, 0.025 INCH PITCH, MO-137AB, QSOP-16
文件頁數(shù)： 4/19頁
文件大?。?/td> 459K
代理商： MAX5116EEE
M
Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
Interface
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V, GND = 0, REFH_ = V
DD
, REFL_ = GND, R
LOAD
= 5k
, C
L
= 100pF, T
A
= -40°C to +85°C, unless otherwise
noted. Typical values are at V
DD
= +3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL TIMING (Figure 4, Note 8)
SCL Clock Frequency
Setup Time for START Condition
Hold Time for START Condition
SCL High Time
SCL Low Time
Data Setup Time
Data Hold Time
SDA, SCL Rise Time
SDA, SCL Fall Time
Setup Time for STOP Condition
f
SCL
t
SU:STA
t
HD:STA
t
HIGH
t
LOW
t
SU:DAT
t
HD:DAT
t
R
t
F
t
SU:STO
400
kHz
μs
μs
μs
μs
ns
μs
ns
ns
μs
0.6
0.6
0.6
1.3
100
0
0.9
300
300
0.6
Bus Free Time Between a STOP
and START Condition
t
BUF
1.3
μs
Pulse Width of Spike Suppressed
t
SP
50
ns
Maximum Capacitive Load for
Each Bus Line
C
B
(Note 9)
400
pF
Write NV Register Busy Time
NONVOLATILE MEMORY RELIABILITY
Data Retention
(Note 10)
15
ms
T
A
= +85°C
T
A
= +25°C
T
A
= +85°C
50
Years
200,000
50,000
Endurance
Stores
Note 1:
All devices are 100% production tested at T
A
= +25°C. All temperature limits are guaranteed by design.
Note 2:
Guaranteed monotonic.
Note 3:
Gain error is defined as:
256
0
×
(
,
V
F Meas
where V
F0,Meas
is the DAC voltage with input code F0 hex and V
F0,Ideal
is the ideal DAC voltage with input code F0 hex or
(V
REFH
- V
REFL
) x (240 / 256) + V
REFL
.
Note 4:
The device draws higher supply current when the digital inputs are driven with voltages between (V
DD
- 0.5V) and (GND +
0.5V). See Supply Current vs. Digital Input Voltage in the
Typical Operating Characteristics
.
Note 5:
Output settling time is measured from the 50% point of the rising edge of the last SCL of the data byte to 0.5 LSB of OUT_’s
final value for a code transition from 10 hex to F0 hex.
Note 6:
Crosstalk is defined as the coupling from a DAC switching from code 00 hex to code FF hex to any other DAC that is in a
steady state at code 00 hex.
Note 7:
Reference feedthrough is defined as the coupling from one driven reference with input code = FF hex to any other DAC
output with the reference of the DAC at a constant value and input code = 00 hex.
Note 8:
SCL clock period includes rise and fall times t
R
and t
F
. All digital input signals are specified with t
R
= t
F
= 2ns and timed
from a voltage level of (V
IL
+ V
IH
) / 2.
Note 9:
An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the document linked to
this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf.
Note 10:
The busy time begins from the initiation of the stop pulse.
0
)
,
_
ZCE
V
V
F Ideal
REFH
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MAX511EEE-T 制造商:Maxim Integrated Products 功能描述:- Tape and Reel
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