參數(shù)資料
型號: MAX5105EEP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: Nonvolatile, Quad, 8-Bit DACs
中文描述: SERIAL INPUT LOADING, 6 us SETTLING TIME, 8-BIT DAC, PDSO20
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-20
文件頁數(shù): 14/19頁
文件大小: 523K
代理商: MAX5105EEP
M
Nonvolatile, Quad, 8-Bit DACs
14
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on the rising edge of CLK corresponding to D0. The
register write command does not affect data stored in
the nonvolatile memory. Figure 6 shows the register
write command timing diagram.
Nonvolatile Read Command
The nonvolatile read command makes the data from
the selected nonvolatile register available to external
devices. Data is clocked out on DOUT during the eight
clock cycles following A0. DOUT returns to a high-
impedance state when
CS
goes high. This command
has no effect on the DAC outputs, operating states, or
contents of the nonvolatile registers. Figure 7 shows the
nonvolatile read command timing diagram. RDY/
BSY
remains high while a read is taking place.
D1
t
COS
D0
CS
CLK
DIN
START
C1
C0
DOUT
OUT_
D3
D2
A2
A0
D7
D6
D5
D4
A1
HIGH IMPEDANCE
AT V
DD
(MAX5105 ONLY)
RDY/BSY
Figure 6. Register Write Command Timing Diagram
START
DIN
CLK
DOUT
A2
A0
A1
HIGH IMPEDANCE
D0
D1
D2
D4
D5
D6
D7
D3
AT V
DD
(MAX5105 ONLY)
CI
CO
CS
RDY/BSY
Figure 7. Nonvolatile Read Command Timing Diagram
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