參數(shù)資料
型號: MAX5077
廠商: Maxim Integrated Products, Inc.
英文描述: Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output
中文描述: 集成推挽式FET驅(qū)動器,帶有振蕩器和可編程時鐘輸出
文件頁數(shù): 6/9頁
文件大?。?/td> 235K
代理商: MAX5077
M
Push-Pull FET Driver with Integrated Oscillator
and Programmable Clock Output
6
_______________________________________________________________________________________
Detailed Description
The MAX5077 is a +4.5V to +15V push-pull, current-fed
topology driver subsystem with an integrated oscillator
for use in 48V module power supplies.
The MAX5077 features a programmable accurate inte-
grated oscillator with a synchronizing clock output that
can be used to synchronize an external PWM stage. A
single external resistor programs the internal oscillator
frequency from 50kHz to 1.5MHz.
The MAX5077 incorporates dual MOSFET drivers with
±3A peak drive currents and a 50% duty cycle. The
MOSFET drivers generate complementary signals to
drive external ground-referenced n-channel MOSFETs.
The MAX5077 CLK output frequency is programmable
through logic inputs that set the f
CLK
:NDRV_ ratio to 1x,
2x, or 4x.
Internal Oscillator
An external resistor at RT programs the MAX5077
s
internal oscillator frequency from 50kHz to 1.5MHz. The
MAX5077 NDRV1 and NDRV2 switching frequencies
are one-half or one-fourth the programmed oscillator
frequency with a nominal 50% duty cycle.
Use the following formula to calculate the internal oscil-
lator frequency:
where f
OSC
is the oscillator frequency and R
RT
is a
resistor connected from RT to AGND in ohms.
Place a 1nF capacitor from RT to AGND for stability
and to filter out noise.
When the f
CLK
:f
NDRV_
ratio is set to 4, the NDRV1 and
NDRV2 switching frequency is limited to one-fourth
f
OSC
. When operating the MAX5077 with the
f
CLK
:f
NDRV_
ratios set to 1 or 2 (see the
Synchronizing
Clock Output
section), the NDRV1 and NDRV2 switch-
ing frequency is set to one-half f
OSC
.
Synchronizing Clock Output
The MAX5077 provides a buffered clock output that can
be used to synchronize the oscillator input of a PWM
controller. CLK is powered from an internal 5V regulator
and sources/sinks up to 10mA. Two logic inputs (SEL2,
SEL1) select CLK output frequency to 1x, 2x, or 4x with
respect to NDRV1 and NDRV2 switching frequency (see
Table 1 and Figure 2). Drive SEL2 and SEL1 low to
disable NDRV1, NDRV2, and CLK outputs. There is a
typical 30ns delay from CLK to NDRV_ output.
f
R
OSC
RT
=
×
10
32
12
Table 1. CLK Output Frequency Selection
SEL2
SEL1
f
CLK
f
NRDV_
f
CLK
to f
NDRV
RATIO
Low
Low
High
High
Low
High
Low
High
NDRV1, NDRV2, and CLK disabled
f
OSC
/ 2
f
OSC
/ 2
f
OSC
f
OSC
/ 2
f
OSC
f
OSC
/ 4
1
2
4
NDRV1
NDRV1
NDRV2
CLK
OSC
NDRV1
NDRV2
CLK
OSC
NDRV1
NDRV2
CLK
OSC
NDRV2
CLK
SEL2 = 0, SEL1 = 0
SEL2 = 0, SEL1 = 1
SEL2 = 1, SEL1 = 0
SEL2 = 1, SEL1 = 1
OSC
Figure 2. MAX5077 CLK Timing Diagram
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相關代理商/技術(shù)參數(shù)
參數(shù)描述
MAX5077AUD 功能描述:功率驅(qū)動器IC Push-Pull FET Driver w/Osc & Clock RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
MAX5077AUD+ 功能描述:功率驅(qū)動器IC Push-Pull FET Driver w/Osc & Clock RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
MAX5077AUD+T 功能描述:功率驅(qū)動器IC Push-Pull FET Driver w/Osc & Clock RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
MAX5077AUD-T 功能描述:功率驅(qū)動器IC Push-Pull FET Driver w/Osc & Clock RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
MAX5078 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4A, 20ns, MOSFET Driver