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參數(shù)資料
| 型號(hào)： | MAX5018 |
| 廠(chǎng)商： | Maxim Integrated Products, Inc. |
| 元件分類(lèi)： | 外設(shè)及接口 |
| 英文描述： | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 電可擦除可編程邏輯器件 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 142K |
| 代理商： | MAX5018 |
M
sinks convert the registered data into the appropriate
analog output. When FT is tied high, the control inputs
and data are not registered. The analog output asyn-
chronously tracks the input data and video controls.
Feedthrough itself is asynchronous and is usually used
as a DC control.
To be registered synchronously, control and data inputs
must be present at the input pins for a specific setup
time (t
s
) before and a specific hold time (t
H
) after
CONV’s rising edge. Setup and hold times are not impor-
tant in asynchronous mode. The minimum pulse widths
high (t
PWH
) and low (t
PWL
), as well as settling time,
become the limiting factors (Figure 4).
The video controls produce the output levels needed
for horizontal blanking, frame synchronization, etc., to
be compatible with video-system standards as
described in RS-343-A. Table 2 shows the video-
control effects on the analog output. Internal logic gov-
erns blank, sync, and force high so that they override
the data inputs as needed in video applications. Sync
overrides both the data and other controls to produce
full negative video output (Figure 5).
Reference-white, video-level output is provided by force
high, which drives the internal digital data to full-scale
output (100IRE units). Bright gives an additional 10% of
full-scale value to the output level. This function can be
used in graphic displays for highlighting menus, cursors,
or warning messages. If the devices are used in non-
video applications, the video controls can be left open.
Convert Cloc k
For best performance, the clock should be differentially
ECL driven by using CONV and
CONV
(Figure 6).
Driving the clock in this manner minimizes clock noise
and power-supply/output intermodulation. The clock’s
rising edge synchronizes the data and control inputs to
the MAX5018. Since
CONV
determines the actual
switching threshold of CONV, the clock can be driven
single-ended by connecting a bias voltage to
CONV
.
This bias voltage sets the converter clock’s switching
threshold.
Analog Outputs
The MAX5018 has two analog outputs that are high-
impedance, complementary current sinks. The outputs
vary in proportion to the input data, controls, and refer-
ence-current values so that the full-scale output can be
changed by setting I
Set
.
In video applications, the outputs can drive a doubly
terminated 50
or 75
load to standard video levels. In
the standard configuration shown in Figure 7, the out-
put voltage is the product of the output current and
load impedance and is between 0V and -1.07V. Out-
(Figure 5) provides a video output waveform with the
Sync pulse bottom at -1.07V. Out+ is inverted with
Sync up.
8-Bit, High-S peed DAC
8
_______________________________________________________________________________________
Figure 3. Reference Buffer and DAC Output Circuit
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| MAX5019CSA | 功能描述:電流型 PWM 控制器 w/Integrated Startup RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)頻率:27 KHz 上升時(shí)間: 下降時(shí)間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| MAX5019CSA+ | 功能描述:電流型 PWM 控制器 w/Integrated Startup RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)頻率:27 KHz 上升時(shí)間: 下降時(shí)間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
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