Low RON, Dual-SPDT/Single-DPDT Analog Switches with Slow Turn-On" />
參數(shù)資料
型號: MAX4993EVKIT+
廠商: Maxim Integrated Products
文件頁數(shù): 3/10頁
文件大?。?/td> 0K
描述: EVALUATION KIT FOR MAX4993
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
主要目的: 接口,模擬開關(guān)
嵌入式:
已用 IC / 零件: MAX4993
主要屬性: 1 x DPDT 開關(guān)
次要屬性: 1.8 V ~ 5.5 V 電源
已供物品:
MAX4991–MAX4994
Low RON, Dual-SPDT/Single-DPDT Analog
Switches with Slow Turn-On Time
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.0V, TA = +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to GND.)
VCC, CB_, EN ........................................................-0.3V to +6.0V
COM_, NC_, NO_ ...................................... -0.3V to (VCC + 0.3V)
Continuous Current COM_, NC_, NO_ ...........................±350mA
Peak Current COM_, NC_, NO_ (pulsed at 1ms,
50% duty cycle)..........................................................±700mA
Peak Current COM_, NC_, NO_ (pulsed at 1ms,
10% duty cycle)..............................................................±1.5A
Continuous Power Dissipation (TA = +70°C)
10-Pin UTQFN (derate 6.9mW/°C above +70°C).........559mW
Junction-to-Case Thermal Resistance (
θJC) (Note 1)
10-Pin UTQFN ...........................................................20.1°C/W
Junction-to-Ambient Thermal Resistance (
θJA) (Note 1)
10-Pin UTQFN .........................................................143.1°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature Range ..........................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Power-Supply Range
VCC
1.8
5.5
V
Undervoltage Lockout
VUVLO
1.4
V
VCC = +3V
1.2
2.5
VCB1 = VCB2 = 0V or VCC
VCC = +5.5V
3.1
6
VCC = +2.7V
3
Supply Current
(MAX4991/MAX4992)
ICC
VCB1 = VCB2 = +0.5V or
+1.4V
VCC = +5.5V
14
μA
VEN = VCC, VCB = 0V or VCC
VCC = +5.5V
0.1
1
VCC = +3V
1.2
2.5
VEN = 0V, VCB = 0V or VCC
VCC = +5.5V
3.1
6
VCC = +2.7V
3
Supply Current
(MAX4993/MAX4994)
ICC
VEN = VCB = +0.5V or +1.4V
VCC = +5.5V
8.5
μA
Power-Supply Rejection
Ratio
PSRR
RL = RS = 50 , f = 20kHz
80
dB
Analog Signal Range
VNC_, VNO_,
VCOM_
0
VCC
V
TA = +25°C
0.3
0.5
On-Resistance
RON
VCC = +2.7V, VNC_ or VNO_ = 0
to VCC, ICOM_ = 100mA
TA = TMIN to TMAX
0.6
On-Resistance Match
Between Channels
RON
VCC = +2.7V, between NC_, NO_ only,
ICOM_ = 100mA, VNC_ or VNO_ = VCC/2
3
m
On-Resistance Flatness
RFLAT
VCC = +2.7V, VNC_ or VNO_ = 0 to VCC,
ICOM_ = 100mA (Note 3)
1
m
f = 20Hz to 20kHz
1
COM_ Output Noise
NCOM_
VNC_ = VNO_ = 0V, RL = 50
f = 0Hz to 1MHz
50
μVRMS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
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