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參數(shù)資料
| 型號： | MAX498 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | High-Output RS-485 Transceiver 8-PDIP -40 to 85 |
| 中文描述： | 四路-三路、SPDT、RGB開關，帶有250MHz視頻緩沖放大器 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 155K |
| 代理商： | MAX498 |
M
Quad/Triple, S PDT, RGB S witc hes
with 250MHz Video Buffer Amplifiers
_______________________________________________________________________________________
7
______________________________________________________________Pin Desc ription
—
23
22
21
28
IN0A
Signal Input 0, Channel A
27
LE
Latch-Enable Input. With LE = 1,
EN
is latched along with A0 when
CS
goes high. When LE = 0,
the
EN
latch is transparent independently of
CS
’
s state.
26
EN
Output Buffer-Enable Input.
EN
= 0 enables the output buffer amplifiers, and
EN
= 1 disables
the output buffers if
CS
is low.
EN
is latched during
CS
’
s low-to-high transition if LE is high.
EN
is not latched if LE is low.
25
A0
Address Input. A0 = 0 selects channel A, and A0 = 1 selects channel B if
CS
is low. A0 is
latched on
CS
’
s
l
ow-to-high transition.
20
—
19
16
24
CS
Chip-Select Input. When
CS
is low, the A0 and
EN
latches are transparent. The data present at A0
is latched when
CS
goes high. LE’s status determines whether
EN
is latched along with A0, or if the
EN
latch remains transparent independently of
CS
.
23
OUT0
Output 0
20
OUT1
Output 1
18
OUT2
Output 2
MAX499
2, 4, 9,
11, 24
1
3
7, 17
—
6, 18
5
14
13, 15
12
10
8
NAME
FUNCTION
MAX498
1, 3, 5,
11, 13,
19
GND
Analog Ground. All ground pins are internally connected. Connect all ground pins externally to
ground to minimize impedance.
PIN
2
IN1A
Signal Input 1, Channel A
4
IN2A
Signal Input 2, Channel A
9, 21
V
EE
Negative Power-Supply Voltage. Connect V
EE
to -5V. V
EE
pins are internally connected.
Connect both pins to -5V externally to minimize supply impedance. Bypass each pin to
ground with a 0.1μF ceramic capacitor.
8
IN0B
Signal Input 0, Channel B
7, 22
V
CC
Positive Power-Supply Voltage. Connect V
CC
to +5V. V
CC
pins are internally connected.
Connect both pins externally to +5V to minimize supply impedance. Bypass each pin to
ground with a 0.1μF ceramic capacitor.
6
IN3A
Signal Input 3, Channel A
16
OUT3
Output 3
15, 17
N.C.
No Connect. Not internally connected; connect to GND.
14
IN3B
Signal Input 3, Channel B
12
IN2B
Signal Input 2, Channel B
10
IN1B
Signal Input 1, Channel B
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