參數(shù)資料
型號: MAX4533MJP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: System-Level Digital Signal Processor 257-BGA MICROSTAR
中文描述: QUAD 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP20
封裝: CERDIP-20
文件頁數(shù): 10/12頁
文件大?。?/td> 172K
代理商: MAX4533MJP
Failure Modes
The MAX4533 is not a lightning arrester or surge pro-
tector. Exceeding the fault-protection voltage limits on
NO_ or NC_, even for very short periods, can cause the
device to fail.
Applic ations Information
Ground
There is no connection between the analog signal
paths and GND. The analog signal paths consist of an
N-channel and P-channel MOSFET with their sources
and drains paralleled and their gates driven out of
phase to V+ and V- by the logic-level translators.
V+ and GND power the internal logic and logic-level
translators and set the input logic thresholds. The logic-
level translators convert the logic levels to switched V+
and V- signals to drive the gates of the switches. This
drive signal is the only connection between the power
supplies and the analog signals. GND, IN_, and COM_
have ESD protection diodes to V+ and V-.
S upply Current Reduc tion
When the logic signals are driven rail-to-rail from 0 to
+12V or -15V to +15V, the supply current reduces to
approximately half of the supply current when the logic
input levels are at 0 to 5V.
Power S upplies
The MAX4533 operates with bipolar supplies between
±4.5V and ±18V. The V+ and V- supplies need not be
symmetrical, but their difference can not exceed the
absolute maximum rating of +44V. The MAX4533 oper-
ates from a single supply between +9V and +36V when
V- is connected to GND.
M
Quad, Rail-to-Rail, Fault-Protec ted,
S PDT Analog S witc h
10
______________________________________________________________________________________
Table 1. Switch States in Normal and Fault Conditions
INPUT
RANGE
On
On
On
On
On
On
Between Rails
Between Rails
POWER
SUPPLIES
(V+, V-)
NC_
On
Off
On
Off
On
Off
NO_
Off
On
Off
On
Off
On
OUTPUT
NC_
NO_
V+
V+
V-
V-
Between V+ and (+40V - V+)
Between V+ and (+40V - V+)
Between V- and (-40V - V-)
Between V- and (-40V - V-)
Off
Between Rails
Off
Off
Follows the load
terminal voltage.
Test Circ uits/T iming Diagrams
t
R
< 20ns
t
F
< 20ns
50%
0V
+10V
LOGIC
INPUT
V-
-15V
2k
COM_
GND
(REPEAT TEST FOR IN2, IN3, AND IN4.)
V
IN
+10V
IN_
NO_
50%
t
OPEN
50%
50%
50%
50%
3V
t
OPEN
t
ON
t
OFF
t
ON
t
OFF
0V
-10V
V
COM
+15V
V+
NC_
-10V
SWITCH OUTPUT
MAX4533
Figure 2. Switching-Time Test Circuit
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