參數(shù)資料
型號: MAX4523EEE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運動控制電子
英文描述: Digital Signal Processor 144-BGA MICROSTAR
中文描述: QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO16
封裝: 0.150 INCH, 0.025 INCH PITCH, MO-137AB, QSOP-16
文件頁數(shù): 9/12頁
文件大小: 155K
代理商: MAX4523EEE
M
Quad, Low-Voltage, S PS T Analog S witc hes
_______________________________________________________________________________________
9
V
GEN
GND
NC or
NO
C
L
V
OUT
V-
V-
V+
V
OUT
IN
OFF
ON
OFF
V
OUT
Q = (
V
OUT
)(C
L
)
COM
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IN
= +3V
V+
R
GEN
IN
MAX4521
MAX4522
MAX4523
Figure 3. Charge Injection
tr < 20ns
tf < 20ns
50%
0V
LOGIC
INPUT
V-
V-
R
L
300
NO
or NC
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
OUT
= V
COM
(
R
L
)
V
L
+ R
ON
SWITCH
INPUT
IN
+3V
t
OFF
0V
COM
SWITCH
OUTPUT
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
L
35pF
V+
V
OUT
V
COM
0V
MAX4521
MAX4522
MAX4523
50%
0.9 x V
0UT1
+3V
0V
0V
LOGIC
INPUT
SWITCH
OUTPUT 2
(V
OUT2
)
0V
0.9 x V
OUT2
t
D
t
D
LOGIC
INPUT
V-
V-
R
L2
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
COM2
IN1, 2
COM1
V
OUT2
V+
V+
C
L2
V
COM1
R
L1
V
OUT1
C
L1
R
L
= 300
C
L
= 35pF
NO
NC
SWITCH
OUTPUT 1
(V
OUT1
)
MAX4523
V
COM2
Figure 1. Switching Time
Figure 2. Break-Before-Make Interval (MAX4523 only)
______________________________________________Test Circ uits/T iming Diagrams
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