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參數(shù)資料
| 型號(hào)： | MAX445 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Low-Cost, High-Resolution, 200MHz Video CRT Driver(低功耗,高分辨率,Z軸視頻顯示器) |
| 中文描述： | 低成本，高解析度，200MHz的視頻CRT顯示器驅(qū)動(dòng)（低功耗，高分辨率，?軸視頻顯示器） |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 96K |
| 代理商： | MAX445 |
IOUT
The MAX445’s output is an open collector of a cascode
amplifier. This output is designed to work with nominal
output supplies of V
AA
= +75V. The high-voltage supply
must be greater than any applied VCB voltage for proper
operation. The MAX445 sinks up to 250mA. Optimum
performance into a capacitive load can be achieved
when an impedance-matching network is used.
V CB
The output stage consists of a common-base, high-voltage
stage and a high-speed, low-voltage current amplifier in a
cascode arrangement. The VCB input is the base connec-
tion to the common-base device of this stage. Be sure to
provide a stable DC voltage at this pin of nominally +10V.
High-frequency compensation at this input is required to
avoid output oscillations. Use a series 24
resistor to sup-
ply, shunted with a 10pF capacitor to ground (Figure 1).
Smaller values of this RC combination will improve output
rise/fall times, but can cause output oscillations.
Power S upplies
+10V and -10.5V supplies are required for proper opera-
tion. These supplies can be set to ±12V for conve-
nience, however this will add additional component
power dissipation. The high-voltage supply, V
AA
, can be
any voltage between VCB + 10V and VCB + 65V.
V
EEO
(pin 21) is the negative supply to the output stage
and must be DC connected to V
EE
(pins 8 and 9), the
most negative voltage applied to the device. However,
V
EEO
must be decoupled from V
EE
to prevent output
oscillations. A ferrite bead and separate 0.1μF decou-
pling capacitors, as shown in Figure 1, will provide
appropriate decoupling.
Power-S upply S equenc ing
Power-supply sequencing is important to avoid internal
device latchup. To avoid sequencing problems, external
diodes should be placed from V
EE
to ground, from
ground to V
CC
, and from V
CC
to the output supply (V
AA
),
as shown in Figure 1. With diodes used as shown, spe-
cial power-supply sequencing is not required.
CRT Arc Protec tion
The MAX445 must be protected from electrostatic dis-
charge (“arcs”) from the CRT. It is recommended that the
output be clamped with a low-capacitance (less than
2pF) diode to the V
AA
supply. The peak current-handling
capability required of the diode is a function of the CRT
arc characteristics, but typically should be 1A or more,
such as Philips BAV20 or Hitachi 1SS91. For additional
information regarding arc protection, contact Maxim’s
applications department.
Impedanc e Matc hing Network
For maximum speed from the MAX445, be sure to
“match” the output to the CRT. Figure 1’s typical connec-
tion diagram shows a network (including parasitic reac-
tances) associated with arc protection devices, CRT
wiring and grid structure, and load resistors. These para-
sitic reactances are all detrimental to good transient
response and should be minimized as much as possible.
C
L
is the grid-to-cathode capacitance of the CRT, plus
any parasitic capacitance to ground associated with the
cathode structure. This capacitance varies from tube-
type to tube-type over the 4pF to 12pF range.
In Figure 1, L
S
is the inductance of the lead from the
amplifier board to the CRT cathode and the return path
from the grid to circuit ground. A wire in free space has
an inductance of 20nH/inch to 25nH/inch. With care, the
total path through the CRT gun can be kept at 1.5 to 2
inches, such that L
S
ranges from 30nH to 50nH.
Excessive lead length will cause undesirable overshoot
and ringing in the transient response.
The peaking networks assume that 2pF of parasitic
capacitance is associated with the CRT arc protection
diode connected at the junction of L3 and L1.
Lr is the parasitic inductance of the load resistor, R
L
. In
some cases, C
R
may be needed to improve step
response.
R
S
is a damping resistor in series with the CRT grid.
It also provides current limiting in the event of CRT
arcing.
The equations for determining optimum peaking net-
work values are as follows:
L1 = (R
L
)
2
(C
L
) / 4
L2 = 3(R
L
)
2
(C
L
) / 4
C
B
= C
L
/ 5
R
S
= R
L
/ 2
L3 = k
3
(R
L
)
2
[2.5 x 10
-12
]
C
R
(optional) = Lr / (2R
L2
)
k
3
is an empirically determined factor increasing with
C
L
and varying from 0 for C
L
~ 2pF to 1 for C
L
~ 12pF.
However, L3 >100nH will compromise large-signal per-
formance.
Table 1 shows peaking networks for the nominal load,
R
L
= 200
(and R
S
= 100
).
Optimum peaking depends on board layout and CRT
construction. The values given by these equations
should be used as starting points for empirically deter-
mining optimum values.
M
Low-Cost, High-Resolution, 200MHz
Video CRT Driver
_______________________________________________________________________________________
5
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