參數(shù)資料
型號(hào): MAX4310ESA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: High-Speed, Low-Power, Single-Supply, Multichannel, Video Multiplexer-Amplifiers
中文描述: 2-CHANNEL, VIDEO MULTIPLEXER, PDSO8
封裝: 0.150 INCH, SOIC-8
文件頁數(shù): 15/20頁
文件大?。?/td> 404K
代理商: MAX4310ESA
M
High-S peed, Low-Power, S ingle-S upply,
Multic hannel, Video Multiplexer-Amplifiers
______________________________________________________________________________________
15
Driving Capac itive Loads
A correctly terminated transmission line is purely resis-
tive and presents no capacitive load to the amplifier.
Reactive loads decrease phase margin and may pro-
duce excessive ringing and oscillation (see Typical
Operating Characteristics).
Another concern when driving capacitive loads origi-
nates from the amplifier’s output impedance, which
appears inductive at high frequencies. This inductance
forms an L-C resonant circuit with the capacitive load,
which causes peaking in the frequency response and
degrades the amplifier’s phase margin.
Although the MAX4310–MAX4315 are optimized for AC
performance and are not designed to drive highly capaci-
tive loads, they are capable of driving up to 20pF without
oscillations. However, some peaking may occur in the fre-
quency domain (Figure 6). To drive larger capacitive
loads or to reduce ringing, add an isolation resistor
between the amplifier’s output and the load (Figure 7).
The value of R
ISO
depends on the circuit’s gain and the
capacitive load (Figure 8). Figure 9 shows the
MAX4310–MAX4315 frequency response with the isola-
tion resistor and a capacitive load. With higher capaci-
tive values, bandwidth is dominated by the RC network
formed by R
ISO
and C
L
; the bandwidth of the amplifier
itself is much higher. Also note that the isolation resistor
forms a divider that decreases the voltage delivered to
the load.
Figure 10. High-Speed EV Board Layout—Component Side
Figure 11. High-Speed EV Board Layout—Solder Side
1
1
0
0
1
2
0
0
1
CHANNEL SELECTED
None, High-Z Output
A2
X
SHDN
0
1
1
1
0
1
1
3
4
5
0
1
0
A1
X
1
0
0
1
1
1
1
6
7
1
1
1
0
0
A0
X
1
0
1
0
1
1
1
0
1
CHANNEL SELECTED
None, High-Z Output
A2
SHDN
0
1
3
2
1
MAX4311/MAX4314
A1
1
MAX4312/MAX4315
1
1
0
A0
X
1
0
1
1
0
1
CHANNEL SELECTED
None, High-Z Output
A2
SHDN
0
0
0
A1
X
1
0
A0
X
MAX4310/MAX4313
Table 2. Input Control Logic
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