參數(shù)資料
型號: MAX428CPA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運動控制電子
英文描述: Low-Power Differential Line Driver And Receiver Pair 14-SOIC -40 to 85
中文描述: DUAL OP-AMP, 16000 uV OFFSET-MAX, 100 MHz BAND WIDTH, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 8/12頁
文件大?。?/td> 146K
代理商: MAX428CPA
M
margin (gain at loop phase = 360°) at frequencies of 70
to 100MHz which at a gain margin of 5dB (R
L
= 2k, C
L
= 5pF) results in a peak in the gain of 3 amplifier con-
figurations as shown in Figures 3 and 4.
Figure 3 shows a blow up of the open loop characteris-
tics in the 10MHz to 200MHz frequency range, as well
as the corresponding closed loop characteristics for a
gain of three non-inverting amplifier at similar load con-
ditions. It should be noted that the open loop character-
istic does not show the additional phase shift covered
by the input capacitance pole. This is why the closed
loop peaking at 30 to 40MHz is greater than what
would be expected from the 50 to 60 degrees of phase
margin indicated by the open loop characteristics.
Corresponding small signal step response characteris-
tics show well-behaved pulse waveforms with 16–33%
overshoot.
The input capacitive pole can be neutralized by adding
a feedback capacitor to R
2
. The value of capacitance
is selected according to R
1
C
IN
= R
2
C
FB
, where C
IN
is
the sum of the common mode and differential input
capacitance
5pF. For R
2
= 2R
1
, C
FB
= C
IN/2
2.5pF.
Figure 4 shows the results of this feedback capacitor
addition. Neutralizing the input capacitance demon-
strates the peaking that can result from the loss of gain
margin at 70 to 100MHz. As the load time constant
(R
L
C
L
) increases the peaking gets progressively worse
6dB at R
L
= 2K, C
L
= 50pF. The step response wave-
forms are as expected with a very strong 88MHz ring
being exhibited at R
L
= 2k, C
L
= 50pF and no over-
shoot at R
L
= 50
, CL = 5pF.
Layout Considerations
As with any high-speed wideband amplifier, certain lay-
out considerations are necessary to ensure stable opera-
tion. All connections to the amplifier should remain as
short as possible, and the power supplies bypassed with
0.1μF capacitors to signal ground. It is suggested that a
ground plane be considered as the best method for
ensuring stability because it minimizes stray inductance
and unwanted coupling in the ground signal paths.
To minimize capacitive effects, resistor values should be
kept as small as possible, consistent with the application.
MAX 408 Offset V oltage Nulling
The configuration of Figure 2 will give a typical V
OS
nulling range of ±15mV. If a smaller adjustment range is
desired, resistor values R1 and R2 can be increased
accordingly. For example, at R1 = 3.6k
, the adjustment
range is ±5mV. Since pins 1 and 5 are not part of the sig-
nal path, AC characteristics are left undisturbed.
S ingle/Dual/Quad High-S peed, Fast-S ettling,
High Output Current Operational Amplifier
8
_______________________________________________________________________________________
2
V+ BAL.
BAL.
56
1
3
R
2
= 1.3k
R
1
= 1.3k
R
P
= 10k
Figure 2. V
OS
Nulling Method for MAX408
Simplified Schematic. For MAX428/448 omit balance pins.
相關PDF資料
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