參數(shù)資料
型號: MAX4286EUT-T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Low-Power Differential Line Driver And Receiver Pairs 8-SOIC -40 to 85
中文描述: BUFFER AMPLIFIER, PDSO6
封裝: SOT-23, 6 PIN
文件頁數(shù): 12/16頁
文件大?。?/td> 377K
代理商: MAX4286EUT-T
M
+3V/+5V, 250MHz, SOT23 ADC Buffer Amplifiers
with High-Speed Disable
12
______________________________________________________________________________________
R
G
R
F
R
S
C
I
C
I
MAX4285
MAX4286
MAX4287
MAX4288
MAX4387
MAX4388
Figure 1. Using an Isolation Resistor (R
S
) for High Capacitive
Loads
For example, a noninverting gain-of-two configuration
(R
F
= R
G
) using 1k
resistors, combined with 2pF typi-
cal amplifier input capacitance, generates a pole at
159MHz. Since this pole is within the amplifier band-
width, it jeopardizes stability. Reducing these 1k
resistors to 100
extends the pole frequency to
1.59GHz, but affects output swing by adding 200
in
parallel with the amplifier
s load resistor. The typical
value for R
F
is 300
.
Layout and Power-Supply Bypassing
These amplifiers operate from a single +2.85V to +6.5V
power supply or from ±1.425V to ±3.25V dual supplies.
For single-supply operation, bypass V
CC
to ground with
a 0.1nF capacitor as close to the pin as possible, with a
0.1μF capacitor in parallel. If operating with dual sup-
plies, bypass each supply with capacitors to ground.
Observe the following guidelines:
A solid ground plane is essential for good high-fre-
quency behavior.
Where possible, use multiple ground vias.
Use a PC board with at least two layers. Avoid
areas of unreferenced copper-clad.
Keep signal traces as short and as straight as pos-
sible. Do not make sharp turns; round all trace
corners.
Use a constant-impedance board design if possi-
ble.
High-Speed Disable
The MAX4285/MAX4286/MAX4288 and MAX4388 fea-
ture a disable (DISABLE_) input that places the amplifi-
er in a low-power, high-output-impedance state. When
DISABLE_ is asserted, the amplifier
s output impedance
is typically 35k
. This high output impedance, com-
bined with the low 2pF output capacitance, make these
devices ideal for ADC input multiplexing applications or
switch applications. Typical enable/disable times are
40ns/50ns.
Output Capacitive Loading and Stability
These op amps are optimized for AC performance.
They are not designed to drive highly reactive loads,
which decrease phase margin and may produce
excessive ringing and oscillation. A small isolation
resistor (usually 20
to 30
) placed before the reactive
load reduces possible ringing and oscillation (Figure
1). At higher capacitive loads, AC performance is
dependent on the interaction of the load capacitance,
the isolation resistor, and on-board layout.
Output Drive Capability
The MAX4285
MAX4288 and MAX4387/MAX4388 have
an output sink capability of 106mA and a source capa-
bility of 77mA. This high current ability allows them to
drive low-impedance and dynamic-impedance ADC
inputs. The linear output range of these devices is (V
EE
+ 0.4V) to (V
CC
- 0.4V). Operation beyond this range is
not recommended due to reduced gain and phase
margin.
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MAX4289EUT-T Low-Power Differential Line Driver And Receiver Pairs 8-PDIP -40 to 85
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