參數(shù)資料
型號: MAX4017ESA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運動控制電子
英文描述: Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23
中文描述: DUAL BUFFER AMPLIFIER, PDSO8
封裝: SO-8
文件頁數(shù): 9/12頁
文件大?。?/td> 119K
代理商: MAX4017ESA
M
Low-Cost, High-Speed, Single-Supply, Gain of +2
Buffers with Rail-to-Rail Outputs in SOT23
_______________________________________________________________________________________
9
Input V oltage Range and Output S wing
The input range for the MAX4014 family extends from
(V
EE
- 100mV) to (V
CC
- 2.25V). Input ground sensing
increases the dynamic range for single-supply applica-
tions. The outputs drive a 2k
load to within 60mV of
the power-suply rails. With heavier loads, the output
swing is reduced as shown in the Electrical Character-
istics and the Typical Operating Characteristics. As the
load increases, the input range is effectively limited by
the output-drive capability, since the buffers have a
fixed voltage gain of +2 or -1.
For example, a 50
load can typically be driven from
40mV above V
EE
to 1.6V below V
CC
, or 40mV to 3.4V
when operating from a single +5V supply. If the buffer is
operated in the noninverting, gain of +2 configuration
with the inverting input grounded, the effective input
voltage range becomes 20mV to 1.7V, instead of the
-100mV to 2.75V indicated by the Electrical Character-
istics. Beyond the effective input range, the buffer out-
put is a nonlinear function of the input, but it will not
undergo phase reversal or latchup.
Enable
The MAX4019 has an enable feature (EN_) that allows
the buffer to be placed in a low-power state. When the
buffers are disabled, the supply current will not exceed
550μA per buffer.
As the voltage at the EN_ pin approaches the negative
supply rail, the EN_ input current rises. Figure 2 shows
a graph of EN_ input current versus EN_ pin voltage.
Figure 3 shows the addition of an optional resistor in
series with the EN pin, to limit the magnitude of the cur-
rent increase. Figure 4 displays the resulting EN pin
input current to voltage relationship.
20
-160
0
100
300
500
-100
-120
0
V
IL
(mV ABOVE V
EE
)
I
μ
A
200
400
-60
-140
-20
-40
-80
Figure 2. Enable Logic-Low Input Current vs. Enable Logic-
Low Threshold
OUT
IN-
EN_
IN+
10k
ENABLE
MAX40_ _
500
500
Figure 3. Circuit to Reduce Enable Logic-Low Input Current
0
-10
0
100
300
500
-7
-8
-1
V
IL
(mV ABOVE V
EE
)
I
μ
A
200
400
-3
-5
-9
-2
-4
-6
Figure 4. Enable Logic-Low Input Current vs. Enable Logic-
Low Threshold with 10k
Series Resistor
相關PDF資料
PDF描述
MAX4014 Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23
MAX4014EUK Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23
MAX4019 Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23
MAX4019ESD Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23
MAX4022 Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23
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