M
3.2Gbps SFP Transimpedance
Amplifiers with RSSI
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7
Voltage Amplifier Stage
The voltage amplifier stage provides gain and converts
the single-ended input to differential outputs.
DC Cancellation Circuit
The DC cancellation circuit uses low-frequency feed-
back to remove the DC component of the input signal
(Figure 3). This feature centers the input signal within
the transimpedance amplifier’s linear range, thereby
reducing pulse-width distortion caused by large input
signals. The DC cancellation circuit is internally com-
pensated and therefore does not require external
capacitors.
Output Buffer
The output buffer provides a reverse-terminated voltage
output. The buffer is designed to drive a 100
differential
load between OUT+ and OUT-. The MAX3724 must be
DC-coupled to the MAX3748A. See Figures 4 and 5.
For optimum supply-noise rejection, the MAX3725
should be terminated with a matched load. If a single-
ended output is required, the unused output should be
terminated to a 50
resistor to V
CC
. The MAX3725
does not drive a DC-coupled, 50
grounded load;
however, it does drive a compatible 50
CML input.
Signal-Strength Indicator
The MAX3724 produces a signal proportional to the
average photodiode current. This is added to the com-
mon mode of the data outputs OUT+ and OUT-. This
signal is intended for use with the MAX3748A to pro-
vide a ground-referenced RSSI voltage.
Applications Information
Signal-Strength Indicator
The SFF-8472 digital diagnostic specification requires
monitoring of input receive power. The MAX3748A and
MAX3724 receiver chipset allows for the monitoring of
the average receive power by measuring the average
DC current of the photodiode.
AMPLITUDE
OUTPUT (LARGE SIGNALS)
TIME
OUTPUT (SMALL SIGNALS)
AMPLITUDE
INPUT FROM PHOTODIODE
TIME
INPUT AFTER DC CANCELLATION
Figure 2. MAX3724/MAX3725 Limited Output
Figure 3. DC Cancellation Effect on Input
OUT+
OUT-
50
50
V
CC
OUT+
OUT-
100
V
CC
Figure 4. Equivalent Output MAX3724
Figure 5. Equivalent Output MAX3725