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參數(shù)資料
| 型號(hào)： | MAX3693ECJ+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 4:1 SERIALIZER 622MBPS 32TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 功能： | 串行器 |
| 數(shù)據(jù)速率： | 622Mbps |
| 輸入類型： | LVDS |
| 輸出類型： | PECL |
| 輸入數(shù)： | 4 |
| 輸出數(shù)： | 1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-LQFP（7x7） |
| 包裝： | 托盤 |
MAX3693
+3.3V, 622Mbps, SDH/SONET 4:1 Serializer
with Clock Synthesis and LVDS Inputs
_______________________________________________________________________________________
5
_______________Detailed Description
The MAX3693 serializer comprises a 4-bit parallel input
register, a 4-bit shift register, control and timing logic, a
PECL output buffer, LVDS input/output buffers, and a
frequency-synthesizing PLL (consisting of a phase/
frequency detector, loop filter/amplifier, voltage-
controlled oscillator, and prescaler). This device con-
verts 4-bit-wide, 155Mbps data to 622Mbps serial data
(Figure 1).
The PLL synthesizes an internal 622Mbps reference
used to clock the output shift register. This clock is
generated by locking onto the external 155.52MHz,
77.76MHz, 51.84MHz, or 38.88MHz reference-clock
signal (RCLK).
The incoming parallel data is clocked into the
MAX3693 on the rising transition of the parallel-clock-
input signal (PCLKI). The control and timing logic
ensure proper operation if the parallel-input register is
latched within a window of time that is defined with
respect to the parallel-clock-output signal (PCLKO).
PCLKO is the synthesized 622Mbps internal serial-
clock signal divided by four. The allowable PCLKO-to-
PCLKI skew is 0 to +4ns. This defines a timing window
at about the PCLKO rising edge, during which
a PCLKI rising edge may occur (Figure 2).
MAX3693
PD3+
PD3-
4-BIT
PARALLEL
INPUT
REGISTER
PHASE/FREQ
DETECT
CONTROL
4-BIT
SHIFT
REGISTER
LVDS
PCLKI-
PCLKI+
RCLK-
RCLK+
FIL+ FIL- CKSET
PCLKO+ PCLKO-
VCO
PECL
SD+
SD-
SHIFT
LATCH
LVDS
PD2+
PD2-
LVDS
PD1+
PD1-
LVDS
PD0+
PD0-
LVDS
PRESCALER
Figure 1. Functional Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3693ECJ+ | 功能描述:串行器/解串器 - Serdes 3.3V 622Mbps SDH/ SONET 1:8 Serializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3693ECJ+T | 功能描述:串行器/解串器 - Serdes 3.3V 622Mbps SDH/ SONET 1:8 Serializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3693ECJ-T | 功能描述:串行器/解串器 - Serdes 3.3V 622Mbps SDH/ SONET 1:8 Serializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3697AETJ+ | 制造商:Microsemi Corporation 功能描述:+3.3V, LOW-JITTER CLOCK GEN W/MULT OUT - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CLOCK GENERATOR 32TQFN 制造商:Microsemi Corporation 功能描述:IC CLOCK GENERATOR 32TQFN |
| MAX3697AETJ+T | 制造商:Microsemi Corporation 功能描述:+3.3V, LOW-JITTER CLOCK GEN W/MULT OUT - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CLOCK GENERATOR 32TQFN 制造商:Microsemi Corporation 功能描述:IC CLOCK GENERATOR 32TQFN |
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