參數(shù)資料
型號: MAX3341EEBE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 其它接口
英文描述: 【15kV ESD-Protected USB Level Translator in UCSP with USB Detect
中文描述: SPECIALTY INTERFACE CIRCUIT, PBGA16
封裝: 4 X 4 MM, UCSP-16
文件頁數(shù): 6/15頁
文件大?。?/td> 349K
代理商: MAX3341EEBE
M
Detailed Description
The MAX3341E is a bidirectional level translator that
converts single-ended or differential logic-level signals
to differential USB signals, and converts differential
USB signals to single-ended or differential logic-level
signals. The MAX3341E includes an internal 1.5k
pullup resistor that connects and disconnects D+ to
VTRM (
Functional Diagram
). The MAX3341E is tolerant
to power sequencing with either V
CC
> V
L
or V
L
> V
CC
.
Additionally, the USB I/O, D+ and D-, and V
CC
are ESD
protected to ±15kV. The MAX3341E can receive USB
power (V
CC
) directly from the USB connection, and
operates with logic supplies (V
L
) down to 1.8V while still
meeting the USB physical layer specifications. The
MAX3341E supports full-speed (12Mbps) USB specifi-
cation 2.0 operation.
The MAX3341E has a unique enumerate feature that
functions when power is applied. Driving ENUM low
disconnects the internal 1.5k
termination resistor from
D+ enumerating the USB. This is useful if changes in
communication protocol are required while power is
applied, and while the USB cable is connected.
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
6
_______________________________________________________________________________________
Pin Description
PIN
TSSOP
UCSP
NAME
FUNCTION
1
D2
RCV
Receiver Output. Single-ended CMOS output. RCV responds to the differential input on D+
and D-.
2
D1
VPO
ASIC Voltage Positive Output. Logic-level data into the MAX3341E.
Mode-Control Input. Selects differential (mode 1) or single-ended (mode 0) input for the
system side when converting logic-level signals to USB level signals. Force MODE high to
select mode 1. Force MODE low to select mode 0.
ASIC Voltage Minus Output. Logic-level data into the MAX3341E.
Output Enable. Drive
OE
low to enable data transmission on D+ and D-. Drive
OE
high to
disable data transmission or to receive data.
3
C2
MODE
4
C1
VMO
5
B1
OE
6
B2
SUSP
Suspend Input. Drive SUSP low for normal operation. Drive SUSP high for low-power state. In
low-power state, RCV is low, and VPI/VMI are active.
7
8
A1
A2
VPI
VMI
ASIC Voltage Positive Input. Logic-level data output from the MAX3341E.
ASIC Voltage Minus Input. Logic-level data output from the MAX3341E.
9
B3
ENUM
Enumerate. Drive ENUM high to connect the internal 1.5k
resistor from D+ to 3.3V. Drive
ENUM low to disconnect the internal 1.5k
resistor.
10
A3
V
CC
USB-Side Power-Supply Input. Connect V
CC
to the incoming USB power supply. Bypass V
CC
to GND with a 1μF ceramic capacitor.
11
A4
GND
Ground
12
B4
D-
Negative USB Differential Data Input/Output. Connect to the USB
s D- signal through a 23.7
±
1% resistor.
13
C4
D+
Positive USB Differential Data Input/Output. Connect to the USB
s D+ signal through a 23.7
±
1% resistor.
14
D4
VTRM
Regulated Output Voltage. 3.3V output derived from the V
CC
input. Bypass VTRM to GND
with a 1μF (min) low-ESR capacitor such as ceramic or plastic film types.
15
D3
V
L
System-Side Power-Supply Input. Connect to the system
s logic-level power supply, 1.8V to
3.6V.
16
C3
USB_DET
USB Detector Output. A high at USB_DET signals to the ASIC that V
CC
is present. A low at
USB_DET indicates that V
CC
is not present.
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