參數(shù)資料
型號(hào): MAX3320TCAP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 通用總線功能
英文描述: Transceiver
中文描述: LINE TRANSCEIVER, PDSO20
封裝: 0.200 INCH, 0.65 MM PITCH, SSOP-20
文件頁數(shù): 9/17頁
文件大小: 389K
代理商: MAX3320TCAP
M
±15kV ESD-Protected USB Transceiver
in UCSP
_______________________________________________________________________________________
9
SUSP
SUSP, or suspend, is a control input. When SUSP is
forced high the MAX3346E enters a low-power state. In
this state, the quiescent supply current into V
CC
is less
than 40μA. In this mode, RCV is forced low, and D+ and
D- are high-impedance inputs (Table 3d).
In suspend mode, data can only be transmitted with
full-speed slope control.
SPEED
SPEED is a control input that selects between low-speed
(1.5Mbps) and full-speed (12Mbps) USB transmission.
Internally, it selects whether the 1.5k
pullup resistor is
connected to D+ (full-speed) or D- (low-speed)
(
Functional Diagram
). Force SPEED high to select full
speed, or force SPEED low to select low speed.
VTRM
VTRM is the 3.3V output of the internal linear voltage
regulator. The regulator is used to power the internal
portions of the USB side of the MAX3346E. The VTRM
regulator’s supply input is V
CC
. Connect a 1.0μF (or
greater) ceramic or plastic capacitor from VTRM to
GND, as close to VTRM as possible. Do not use VTRM
to provide power to external circuitry.
D+ and D-
D+ and D- are the transceiver I/O connections, and are
ESD protected to ±15kV using the Human Body Model,
making the MAX3346E ideal for applications where a
robust transmitter is required.
V
CC
Bypass V
CC
to GND with a 1μF capacitor. Place the
1μF capacitor as close as possible to the MAX3346E.
Figure 1b. Enable and Disable Timing, Transmitter
Figure 1a. Enable and Disable Timing, Receiver
D+/D-
t
PDZ
t
PZD
V
OHD
- 0.3V
V
OLD
+ 0.3V
V
L
0V
V
L
/2
OE
VPO
t
PHLO
V
L
0V
D+
D-
0V
VTRM
V
L
/2
t
PLHO
Figure 2. Mode 0 Timing
t
PLH1
V
L
0V
0V
VTRM
V
L
/2
D+
VP
VM
D-
V
L
0V
t
PHL1
V
L
/2
t
PLH1
t
PHL1
V
L
/2
Figure 3. Mode 1 Timing
VP/VM
V
OH
- 0.3V
t
PZV
t
PVZ
V
OL
+ 0.3V
V
L
0V
V
L
/2
OE
Timing Diagrams
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