參數(shù)資料
型號(hào): MAX3175CAI+T
廠商: Maxim Integrated Products
文件頁數(shù): 20/20頁
文件大小: 0K
描述: IC TXRX MULTIPROTOCOL 28-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: 多協(xié)議
電源電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
MXL1544/MAX3175
+5V Multiprotocol, Software-Selectable
Control Transceivers
_______________________________________________________________________________________
9
Detailed Description
The MXL1544/MAX3175 are four-driver/four-receiver
multiprotocol transceivers that operate from a single
+5V supply and the charge pump from the MXL1543.
The MXL1544/MAX3175, along with the MXL1543 and
MXL1344A, form a complete software-selectable DTE
or DCE interface port that supports the V.28 (RS-232),
V.10/V.11 (RS-449, V.36, EIA-530, EIA-530A, X.21, RS-
423), and V.35 protocols. The MXL1544 or MAX3175
usually carries the control signals. The MXL1543 car-
ries the high-speed clock and data signals, and the
MXL1344A provides termination for the clock and data
signals.
The MXL1544/MAX3175 feature a 0.5A no-cable
mode, true fail-safe operation, and thermal shutdown
circuitry. Thermal shutdown protects the drivers against
excessive power dissipation. When activated, the ther-
mal shutdown circuitry places the driver outputs into a
high-impedance state. The MAX3175 deglitching fea-
ture reduces errors in unterminated equipment.
The state of the mode-select pins M0, M1, and M2
determines which serial-interface protocol is selected
(Table 1). The state of the DCE/DTE input determines
whether the transceivers will be configured as a DTE
serial port or a DCE serial port. When the DCE/DTE
input is logic HIGH, driver T3 is activated and receiver
R1 is disabled. When the DCE/DTE input is logic LOW,
driver T3 is disabled and receiver R1 is activated. The
INVERT pin state changes the DCE/DTE functionality
regarding T4 and R4 only. M0, M1, M2, INVERT, and
DCE/DTE are internally pulled up to VCC to ensure logic
HIGH if left unconnected.
VOC
R
VOD
Figure 1. V.11 DC Test Circuit
CL
RL
VO
DA
Figure 3. V.10/V.28 Driver Test Circuit
100pF
15pF
100pF
100
D
A
B
A
R
15pF
DA
R
Figure 2. V.11 AC Test Circuit
Figure 4. V.10/V.28 Receiver Test Circuit
Test Circuits
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