M
+1.2V to +5.5V, ±15kV ESD-Protected, 0.1μA,
35Mbps, 8-Channel Level Translators
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11
Pin Description (continued)
PIN
TSSOP
1
2
3
4
5
6
7
8
9
UCSP
B1
A1
A2
B2
A3
B3
A4
B4
A5
NAME
FUNCTION
I/O V
L
1A
V
L
I/O V
L
2A
I/O V
L
3A
I/O V
L
4A
I/O V
L
1B
I/O V
L
2B
I/O V
L
3B
I/O V
L
4B
Input/Output 1A, Referenced to V
L
Logic Input Voltage, +1.2V
≤
V
L
≤
V
CC
. Bypass V
L
to GND with a 0.1μF capacitor.
Input/Output 2A, Referenced to V
L
Input/Output 3A, Referenced to V
L
Input/Output 4A, Referenced to V
L
Input/Output 1B, Referenced to V
L
Input/Output 2B, Referenced to V
L
Input/Output 3B, Referenced to V
L
Input/Output 4B, Referenced to V
L
10
B5
EN A/B
E nab e Inp ut. If E N A/B i s p ul ed l ow channel s 1B thr oug h 4B ar e acti ve, and channel s 1A
thr oug h 4A ar e i n thr ee- state. If E N A/B i s d ven hi g h to V
L
, channel s 1A thr oug h 4A ar e
acti ve, and channel s 1B thr oug h 4B ar e i n thr ee- state.
11
12
13
14
15
16
17
18
19
20
C5
D5
C4
D4
C3
D3
C2
D2
D1
C1
GND
Ground
Input/Output 4B, Referenced to V
CC
Input/Output 3B, Referenced to V
CC
Input/Output 2B, Referenced to V
CC
Input/Output 1B, Referenced to V
CC
Input/Output 4A, Referenced to V
CC
Input/Output 3A, Referenced to V
CC
Input/Output 2A, Referenced to V
CC
V
CC
Input Voltage, +1.65V
≤
V
CC
≤
+5.5V. Bypass V
CC
to GND with a 0.1μF capacitor.
Input/Output 1A, Referenced to V
CC
I/O V
CC
4B
I/O V
CC
3B
I/O V
CC
2B
I/O V
CC
1B
I/O V
CC
4A
I/O V
CC
3A
I/O V
CC
2A
V
CC
I/O V
CC
1A
MAX3003