M
2.4GHz 802.11b Zero-IF Transceivers
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21
onto the line, given the high impedance of the output.
This might result in rectified RF, altering the value of the
bias current and causing erratic PA operation.
Synthesizer
Channel Frequency and Reference Frequency
The synthesizer/PLL channel frequency and reference
settings establish the divider/counter settings in the inte-
ger-N synthesizer of the MAX2820/MAX2821. Both the
channel frequency and reference oscillator frequency
are programmable through the serial interface. The
channel frequency is programmed as a channel num-
ber 0 to 99 to set the carrier frequency to 2400MHz to
2499MHz (LO frequency = channel + 2400). The refer-
ence frequency is programmable to 22MHz or 44MHz.
These settings are intended to cover only the required
802.11b channel spacing and the two possible crystal
oscillator options used in the radios.
Reference Oscillator Input
The reference oscillator inputs ROSCP and ROSCN are
high-impedance analog inputs. They are designed to
be connected to the reference oscillator output through
a coupling capacitor. The input amplitude can range
from 200mV
P-P
to 500mV
P-P
; therefore, in the case of a
reference oscillator with a CMOS output, the signal
must be attenuated before being applied to the ROSC
inputs. The signal can be attenuated with a resistor- or
capacitor-divider network.
Reference Voltage Output
A voltage reference output is provided from pin 2,
VREF, for use with certain baseband ICs. The nominal
output voltage is 1.2V. The reference voltage is first-
order compensated over temperature to provide a rea-
sonably low drift output, 1.1V to 1.3V over temperature,
under load conditions. The output stage is designed to
drive 2mA loads with up to 20pF of load capacitance.
The VREF output is designed to directly connect to the
baseband reference input.
Loop Filter
The PLL uses a classical charge pump into an external
loop filter (C-RC) in which the filter output connects to
the voltage tuning input of the VCO. This simple third-
order lowpass loop filter closes the loop around the
synthesizer. The Typical Application Circuit shows the
loop filter elements around the MAX2820/MAX2821.The
capacitor and resistor values are set to provide the
loop bandwidth required to achieve the desired lock
time while also maintaining loop stability. Refer to the
MAX2820/MAX2821 EV kit schematic for component
values. A 45kHz loop bandwidth is recommended to
ensure that the loop settles quickly enough to achieve
5μs TX turnaround time and 10μs RX turnaround time.
This is the loop filter on the EV kit. Narrowing the loop
bandwidth increases the settling time and results in
unacceptable TX-RX turnaround time performance.
Chip Information
TRANSISTOR COUNT: 13,607