參數(shù)資料
型號： MAX2360ECM
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 無繩電話/電話
英文描述： Quadruple Bus Buffer Gates With 3-State Outputs 14-PDIP -40 to 85
中文描述： TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1 MM HEIGHT, EXPOSED PAD, TQFP-48
文件頁數(shù)： 13/24頁
文件大?。?/td> 413K
代理商： MAX2360ECM
M
Complete Dual-Band
Quadrature Transmitters
______________________________________________________________________________________
13
Electromagnetic
Compliance Considerations
Two major concepts should be employed to produce a
noise-free and EMC-compliant transmitter: minimize cir-
cular current-loop area to reduce H-field radiation and
minimize voltage drops to reduce E-field radiation. To
minimize circular current-loop area, bypass as close to
the part as possible and use the distributed capaci-
tance of a ground plane. To minimize voltage drops,
make V
CC
traces short and wide, and make RF traces
short.
The “don't care” bits in the registers should be “0” in
order to minimize electromagnetic radiation due to
unnecessary bit banging. RC filtering can also be used
to slow the clock edges on the 3-wire interface, reduc-
ing high-frequency spectral content. RC filtering also
provides for transient protection against IEC802 testing
by shunting high frequencies to ground, while the
series resistance attenuates the transients for error-free
operation. The same applies to the override pins
(
SHDN
,
TXGATE
,
IDLE
).
High-frequency bypass capacitors are required close
to the pins with a dedicated via to ground. The 48-pin
TQFP-EP package provides minimal inductance ground
by using an exposed paddle under the part. Provide at
least five low-inductance vias under the paddle to
ground, to minimize ground inductance. Use a solid
ground plane wherever possible. Any cutout in the
ground plane may act as slot radiator and reduce its
shield effectiveness.
Keep the RF LO traces as short as possible to reduce
LO radiation and susceptibility to interference.
Figure 1. Register Configuration
MSB
24 BIT REGISTER
LSB
DATA 20 BITS
ADDRESS 4 BITS
B18
B16
B19
B17
B14
B12
B15
B13
B10
B8
B11
B9
B6
B4
B7
B5
B2
B0
B3
B1
A2
A0
A3
A1
RFM DIVIDE RATIO (18)
ADDRESS
X
B16
X
B17
B14
B12
B15
B13
B10
B8
B11
B9
B6
B4
B7
B5
B2
B0
B3
B1
0
0
0
0
RFM DIVIDE REGISTER
RFR DIVIDE RATIO (13)
ADDRESS
X
X
X
X
X
B12
X
X
B10
B8
B11
B9
B6
B4
B7
B5
B2
B0
B3
B1
0
1
0
0
RFR DIVIDE REGISTER
IFM DIVIDE RATIO (14)
ADDRESS
X
X
X
X
X
B12
X
B13
B10
B8
B11
B9
B6
B4
B7
B5
B2
B0
B3
B1
0
0
0
1
IFM DIVIDE REGISTER
RFR DIVIDE RATIO (11)
ADDRESS
X
X
X
X
X
X
X
X
B10
B8
X
B9
B6
B4
B7
B5
B2
B0
B3
B1
0
1
0
1
IFR DIVIDE REGISTER
CONTROL BITS (16)
ADDRESS
X
X
X
X
B14
B12
B15
B13
B10
B8
B11
B9
B6
B4
B7
B5
B2
B0
B3
B1
1
0
0
0
CONTROL REGISTER
CONFIGURATION BITS (16)
ADDRESS
X
X
X
X
B14
B12
B15
B13
B10
B8
B11
B9
B6
B4
B7
B5
B2
B0
B3
B1
1
1
0
0
CONFIGURATION REGISTER
TEST BITS (8)
ADDRESS
X
X
X
X
X
X
X
X
X
X
X
X
B6
B4
B7
B5
B2
B0
B3
B1
1
1
0
1
TEST REGISTER
X = DON
’
T CARE
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