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參數(shù)資料
| 型號(hào)： | MAX2140 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Complete SDARS Receiver |
| 中文描述： | 完備的SDARS接收器 |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大小： | 162K |
| 代理商： | MAX2140 |
M
Complete S DARS Rec eiver
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
____________________Maxim Integrated Produc ts, 120 S an Gabriel Drive, S unnyvale, CA 94086 408-737-7600
2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
Pac kage Information
For the latest package outline information, go to
www.maxim-ic.com/packages
.
I
2
C Functional Description
I
2
C Register Map:
This is the standard I
2
C protocol. The first byte is either
C6, C4, C2 (hex) dependent on the state of the I
2
CA_
pins, for a write-to-device operation and either C7, C5,
C3 (hex) for a read-from operation (again dependent
on the state of pins I
2
CA_).
Write Operation:
The first byte is the device address plus the direction
bit (R/
W
= 0).
The second byte contains the internal address com-
mand of the first address to be accessed.
The third byte is written to the internal register directed
by the command address byte.
The following bytes (if any) are written into successive
internal registers.
The transfer lasts until stop conditions are encountered.
The MAX2140 acknowledges every byte transfer.
Read Operation:
When either address C3, C5, C7 is sent, the MAX2140
sends back first the status byte then the reserved byte.
See Table 5 and Table 6 for read/write register operations.
Layout Issues
The MAX2140 EV kit can be used as a starting point for
layout. For best performance, take into consideration
power-supply issues, as well as the RF, LO, and IF layout.
Power-S upply Layout
To minimize coupling between different sections of the
IC, the ideal power-supply layout is a star configuration,
which has a large decoupling capacitor at a central
V
CC
node. The V
CC
traces branch out from this node,
each going to a separate V
CC
node in the MAX2140
circuit. At the end of each trace is a bypass capacitor
with impedance to ground less than 1
at the frequen-
cy of interest. This arrangement provides local decou-
pling at each V
CC
pin. Use at least one via per bypass
capacitor for a low-inductance ground connection.
Matc hing Network Layout
The layout of a matching network can be very sensitive
to parasitic circuit elements. To minimize parasitic
inductance, keep all traces short and place compo-
nents as close to the IC as possible. To minimize para-
sitic capacitance, a cutout in the ground plane (and
any other planes) below the matching network compo-
nents can be used. On the high-impedance ports (e.g.,
IF inputs and outputs), keep traces short to minimize
shunt capacitance.
Chip Information
TRANSISTOR COUNT: 22,000
PROCESS: BiCMOS
Device Address Write
(C2, C4, C6)
ACK
Register Address 00
ACK
DATA 0E
ACK
DATA D8
ACK
DATA 26
ACK
STOP
Table 5. Example: Write Registers 1 to 3 with 0E, D8, 26
Start
Device Address Read (C1, C3, C5, C7)
ACK
Status Register 00
ACK/\NACK
STOP
Table 6. Example: Read from Status Registers (Sending an NACK Terminate Slave
Transmit Mode
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相關(guān)代理商/技術(shù)參數(shù) |
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| MAX2140_05 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Complete SDARS Receiver |
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| MAX2140ETH | 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
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| MAX2140ETH+CK3 | 功能描述:通信集成電路 - 若干 Complete SDARS Receiver RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
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