The UVLO circuitry monitors V
BIAS
only. The UVLO
threshold is 4.2V, and V
BIAS
must remain above this
level for proper operation, regardless of the level of V
IN
.
Input Capacitor
Bypass IN to ground with a 10μF or greater ceramic
capacitor. Bypass BIAS to ground with a 0.1μF ceramic
capacitor for normal operation in most applications.
Output Capacitor
Bypass OUT to ground with a low-ESR ceramic capaci-
tor greater than 10μF. The ESR must be less than
35m
. Choose an output capacitor to maintain the
required output voltage tolerance during a load step.
The change in output voltage is,
where I is the load current, C
OUT
is the output capaci-
tance, and
t is the duration of the load step.
Noise, PSRR, and Transient Response
The MAX1982/MAX1983 operate with low-dropout volt-
age and low quiescent current in notebook computers
while maintaining good noise, transient response, and
AC rejection specifications. See the
Typical Operating
Characteristics
for a graph of Power-Supply Rejection
Ratio (PSRR) vs. Frequency. Improved supply-noise
rejection and transient response can be achieved by
increasing the values of the input and output capacitors
and use passive filtering techniques when operating
from noisy sources.
The MAX1982/MAX1983 load-transient response graphs
(see the
Typical Operating Characteristics
) show two
components of the output response: a DC shift from the
output impedance due to the load current change and
the transient response. A typical transient response for a
step change in the load current from 1mA to 300mA is
20mV. Increasing the output capacitor
’
s value and
decreasing the ESR attenuate the overshoot.
Input/Output (Dropout) Voltage
A regulator
’
s minimum input-to-output voltage differen-
tial (dropout voltage) determines the lowest usable sup-
ply voltage. In battery-powered systems, the dropout
voltage determines the useful end-of-life battery volt-
age. Because the MAX1982/MAX1983 use an N-chan-
nel pass transistor, the dropout voltage is a function of
the drain-to-source on-resistance (R
DS(ON)
= 1
max)
multiplied by the load current (see the
Typical
Operating Characteristics
):
PC Board Layout Guidelines
The MAX1982/MAX1983 require proper layout to
achieve the intended output power level, high efficiency,
and low noise. Proper layout involves the use of a
ground plane, appropriate component placement, and
correct routing of traces using appropriate trace widths.
1) Minimize high-current ground loops. Connect the
ground of the device, the input capacitor, and the
output capacitor together at one point.
2) To optimize performance, a ground plane is essen-
tial. Use all available copper layers in applications
where the device is located on a multilayer board.
3) Connect the input filter capacitor less than 10mm
from IN. The connecting copper trace carries large
currents and must be at least 2mm wide, preferably
5mm wide.
4) Use as much copper as necessary to increase the
thermal resistance of the device. In general, more
copper provides better heatsinking capabilities.
Chip Information
TRANSISTOR COUNT: 430
PROCESS: BiCMOS
V
V
V
R
I
DROPOUT
IN
OUT
DS ON
(
OUT
=
=
×
)
V
I ESR
t
C
OUT
=
+
M
Low-Voltage, Low-Dropout Linear Regulators
with External Bias Supply
______________________________________________________________________________________
11
INPUT-OUTPUT DIFFERENTIAL VOLTAGE (V)
M
5
4
3
2
1
50
100
150
200
250
300
350
0
0
T
MAXIMUM CONTINUOUS CURRENT
T
T
A
= +25
°
C
T
A
= +50
°
C
T
J
= +150
°
C
T
A
= +70
°
C
Figure 5. Power Operating Region—Maximum Output Current
vs. Supply Voltage