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參數(shù)資料
| 型號： | MAX194ACPE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit, 85ksps ADC with 10A Shutdown |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 223K |
| 代理商： | MAX194ACPE |
If you read the data bits between conversions, you can
1) count CLK cycles until the end of the conversion, or
2) poll
EOC
to determine when the conversion is
finished, or
3) generate an interrupt on
EOC
’s falling edge.
Note that the MSB conversion result appears at DOUT
after
CS
goes low but
before
the first SCLK pulse. Each
subsequent SCLK pulse shifts out the next conversion
bit. The 15th SCLK pulse shifts out the sub-LSB (S0).
Additional clock pulses shift out zeros.
Data is clocked out on SCLK’s falling edge. Clock data
in on SCLK’s rising edge or, for clock speeds above
2.5MHz, on the following falling edge to meet the maxi-
mum SCLK-to-DOUT timing specification (Figure 7).
The maximum SCLK speed is 5MHz. See the Operating
Modes and SPI/QSPI Interfaces section for additional
information. When the conversion clock is near its maxi-
M
14-Bit, 85ksps ADC with 10μA S hutdown
_______________________________________________________________________________________
9
CLK
START
CONV
MAX194
CONV
START
CLK
SEE DIGITAL INTERFACESECTION
CS
CONV
CLK
(CASE 1)
CLK
(CASE 2)
EOC
t
DV
t
CD
t
CW
t
CEH
CASE 1: CLK IDLES LOW, DATA LATCHED ON RISING EDGE (CPOL = 0, CPHA = 0)
CASE 2: CLK IDLES LOW, DATA LATCHED ON FALLING EDGE (CPOL = 0, CPHA = 1)
NOTE: ARROWS ON CLK TRANSITIONS INDICATE LATCHING EDGE
t
CEL
DOUT
t
DH
B13
CONVERSION
BEGINS
CONVERSION
ENDS
MSB
LSB
SUB-LSBs
B12
B11
B10
B0
S1
S0
B13
B13 FROM PREVIOUS
CONVERSION
Figure 5. Gating
CONV
to Synchronize with CLK
Figure 6. Output Data Format, Reading Data During Conversion (Mode 1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX194AEWE | Circular Connector; No. of Contacts:22; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:13; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:13-35 RoHS Compliant: No |
| MAX194BCWE | 14-Bit, 85ksps ADC with 10A Shutdown |
| MAX194BCPE | 14-Bit, 85ksps ADC with 10A Shutdown |
| MAX194ACWE | 14-Bit, 85ksps ADC with 10A Shutdown |
| MAX194AEPE | Fixed-Point Digital Signal Processor 532-FCBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX194ACWE | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX194ACWE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX194ACWE+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX194ACWE-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX194AEPE | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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