參數(shù)資料
型號: MAX194
廠商: Maxim Integrated Products, Inc.
英文描述: 14-Bit, 85ksps ADC with 10礎(chǔ) Shutdown(85ksps,單通道,14位串行A/D轉(zhuǎn)換器)
中文描述: 14位、85ksps ADC,帶有10µ關(guān)斷
文件頁數(shù): 18/24頁
文件大?。?/td> 267K
代理商: MAX194
M
Complete source code for the Motorola 68HC16 and
the MAX194 evaluation kit (EV kit) using this mode is
available in the MAX194 EV kit manual.
Mode 2 (Asynchronous Data Transfer)
This mode uses a conversion clock (CLK) and a serial
clock (SCLK). The serial data is clocked out between
conversions, which reduces the maximum throughput
for high CLK rates, but may be more convenient for
some applications. Figure 19 is a block diagram with a
QSPI processor (Motorola 68HC16) connected to the
MAX194. Figure 20 shows the associated timing dia-
gram. Figure 21 gives an assembly language listing for
this arrangement.
An OR gate is used to synchronize the “start” signal to
the asynchronous CLK, as described in the External
Clock section. As with Mode 1, the QSPI processor must
run CLK during calibration and either count CLK cycles
or, as is done here, monitor EOC to determine when cal-
ibration is complete. Also, EOC is polled by the μP to
determine when a conversion result is available. When
EOC goes low, data is clocked out at the highest QSPI
data rate (4.19Mbps). After the data is transferred, a
new conversion can be initiated whenever desired.
The timing specification for SCLK-to-DOUT valid (t
SD
)
imposes some constraints on the serial interface. At
SCLK rates up to 2.5Mbps, data is clocked out of the
MAX194 by a falling edge of SCLK and may be
clocked into the μP by the next rising edge (CPOL = 0,
CPHA = 0). For data rates greater than 2.5Mbps (or for
lower rates, if desired) it is necessary to clock data out
of the MAX194 on SCLK’s falling edge and to clock it
into the μP on SCLK’s next falling edge (CPOL = 0,
CPHA = 1). Also, your processor hold time must not
exceed t
SD
minimum (20ns). As with CLK in mode 1,
maximum SCLK rates may not be possible with some
interface specifications that are subsets of SPI.
S upplies, Layout, Grounding
and Bypassing
For best system performance, use printed circuit boards
with separate analog and digital ground planes. Wire-
wrap boards are not recommended. The two ground
planes should be tied together at the low-impedance
power-supply source and at the MAX194, as shown in
Figure 22. If the analog and digital supplies come from
the same source, isolate the digital supply from the ana-
log supply with a low-value resistor (10
).
14-Bit, 85ksps ADC with 10μA S hutdown
18
______________________________________________________________________________________
CS
CLK
START
588ns
239ns
CONVERSION TIME
9.4
μ
s
4.19MHz
1.3
μ
s
17
μ
s
5.1
μ
s
4
μ
s
EOC
SCLK
DOUT
B13
B1 B0
B11
B12
S1
S0
Figure 20. Timing Diagram for Circuit of Figure 19
相關(guān)PDF資料
PDF描述
MAX1963 Low-Input-Voltage, 300mA LDO Regulators with RESETin SOT and TDFN
MAX1963ETT Low-Input-Voltage, 300mA LDO Regulators with RESETin SOT and TDFN
MAX1963EZT Low-Input-Voltage, 300mA LDO Regulators with RESETin SOT and TDFN
MAX1976 Low-Input-Voltage, 300mA LDO Regulators with RESETin SOT and TDFN
MAX1976ETT Low-Input-Voltage, 300mA LDO Regulators with RESETin SOT and TDFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX1940EEE 功能描述:電源開關(guān) IC - USB Triple USB Switch w/Autoreset RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube
MAX1940EEE+ 功能描述:電源開關(guān) IC - USB Triple USB Switch w/Autoreset RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube
MAX1940EEE+T 功能描述:電源開關(guān) IC - USB Triple USB Switch w/Autoreset RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube
MAX1940EEE-T 功能描述:電源開關(guān) IC - USB Triple USB Switch w/Autoreset RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube
MAX1945EVKIT 制造商:Maxim Integrated Products 功能描述:1MHZ, 1% ACCURATE, 6A INTERNAL SWITCH STEP-DO - Bulk