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參數(shù)資料
| 型號： | MAX192AEWP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | Low-Power, 8-Channel, Serial 10-Bit ADC |
| 中文描述： | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | SO-20 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 201K |
| 代理商： | MAX192AEWP |
M
Low-Power, 8-Channel,
S erial 10-Bit ADCs
6
________________________________________________________________________________________________
+5V
3k
C
LOAD
DGND
DOUT
C
LOAD
DGND
3k
DOUT
a) High-Z to V
OH
and V
OL
to V
OH
b) High-Z to V
OL
and V
OH
to V
OL
+3V
3k
C
LOAD
DGND
DOUT
C
LOAD
DGND
3k
DOUT
a) V
OH
to High-Z
b) V
OL
to High-Z
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disabled Time
Pin Desc ription
PIN
NAME
FUNCTION
1–8
CH0–CH7
Sampling Analog Inputs
9, 13
AGND
Analog Ground. Also IN- Input for single-enabled conversions. Connect both AGND pins to
analog ground.
10
SHDN
Three-Level Shutdown Input. Pulling SHDN low shuts the MAX192 down to 10μA (max) supply cur-
rent, otherwise the MAX192 is fully operational. Pulling SHDN high puts the reference-buffer amplifi-
er in internal compensation mode. Letting SHDN float puts the reference-buffer amplifier in external
compensation mode.
11
VREF
Reference Voltage for analog-to-digital conversion. Also, Output of the Reference Buffer Amplifier.
Add a 4.7μF capacitor to ground when using external compensation mode. Also functions as an
input when used with a precision external reference.
12
REFADJ
Reference-Buffer Amplifier Input. To disable the reference-buffer amplifier, tie REFADJ to V
DD
.
14
DGND
Digital Ground
15
DOUT
Serial Data Output. Data is clocked out at the falling edge of SCLK. High impedance when
CS
is
high.
16
SSTRB
Serial Strobe Output. In internal clock mode, SSTRB goes low when the MAX192 begins the A/D
conversion and goes high when the conversion is done. In external clock mode, SSTRB pulses high
for one clock period before the MSB decision. SSTRB is high impedance when
CS
is high
(external mode).
17
DIN
Serial Data Input. Data is clocked in at the rising edge of SCLK.
18
CS
Active-Low Chip Select. Data will not be clocked into DIN unless
CS
is low. When
CS
is high, DOUT
is high impedance.
19
SCLK
Serial Clock Input. Clocks data in and out of serial interface. In external clock mode, SCLK also sets
the conversion speed. (Duty cycle must be 40% to 60% in external clock mode.)
20
V
DD
Positive Supply Voltage, +5V ±5%
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| MAX192AEWP/GG8 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX192AEWP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 8Ch 133ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX192AEWP+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 8Ch 133ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX192AEWP-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX192BCAP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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