M
Multichemistry Battery Charger with Automatic
System Power Selector
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27
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter
and to ensure the stability of the DC-to-DC converter.
(See the
Compensation
section.) Beyond the stability
requirements, it is often sufficient to make sure that the
output capacitor
’
s ESR is much lower than the battery
’
s
ESR. Either tantalum or ceramic capacitors can be
used on the output. Ceramic devices are preferable
because of their good voltage ratings and resilience to
surge currents.
Applications Information
Startup Conditioning Charge for
Overdischarged Cells
It is desirable to charge deeply discharged batteries at
a low rate to improve cycle life. The MAX1909 automati-
cally reduces the charge current when the voltage per
cell is below 3.1V. The charge current-sense voltage is
set to 4.5mV (I
CHG
= 300mA with RS2 = 15m
) until
the battery voltage rises above the threshold. There is
approximately 300mV for 3 cell, 400mV for 4 cell of hys-
teresis to prevent the charge current magnitude from
chattering between the two values.
Thermal Charge Qualification
Based on the cell characteristics, the MAX1909 should
not charge batteries operating above a specified
temperature. Often a PTC thermistor is included inside
the battery pack to measure its temperature. When
connected to the charger, the thermistor forms a voltage-
divider with a resistive pullup to the LDO. The threshold
voltage of
PKPRES
is 90% of V
LDO
(typ), with hysteresis
of 1% of V
LDO
to prevent erratic transitions. The thermis-
tor can be selected to have a resistance vs. temperature
characteristic that abruptly increases above a critical
temperature. This arrangement automatically shuts down
the MAX1909 when the battery pack is above a critical
temperature. For the example shown in Figure 12, a
Thermometrics YSC060 device is selected with the ther-
mal threshold of approximately +60
°
C.
Layout and Bypassing
Bypass DCIN with a 1μF capacitor to ground (Figure 1).
D4 protects the MAX1909 when the DC power source
input is reversed. A signal diode for D4 is adequate
because DCIN only powers the LDO and the internal
reference. Bypass LDO, DHIV, DLOV, and other pins
as shown in Figure 1.
Good PC board layout is required to achieve specified
noise, efficiency, and stable performance. The PC
board layout artist must be given explicit instructions
—
preferably, a sketch showing the placement of the
power-switching components and high-current routing.
Refer to the PC board layout in the MAX1909 evaluation
kit for examples. A ground plane is essential for opti-
mum performance. In most applications, the circuit is
located on a multilayer board, and full use of the four or
more copper layers is recommended. Use the top layer
for high-current connections, the bottom layer for quiet
connections, and the inner layers for an uninterrupted
ground plane.
Use the following step-by-step guide:
1) Place the high-power connections first, with their
grounds adjacent:
a) Minimize the current-sense resistor trace
lengths, and ensure accurate current sensing
with Kelvin connections.
b) Minimize ground trace lengths in the high-current
paths.
c) Minimize other trace lengths in the high-current
paths.
d) Use > 5mm wide traces.
e) Connect C1 and C2 to the high-side MOSFET
(10mm max length). Return these capacitors to
the power ground plane.
f) Minimize the LX node (MOSFETs, rectifier cath-
ode, inductor (15mm max length)).
Ideally, surface-mount power components are
flush against one another with their ground
terminals almost touching. These high-current
grounds are then connected to each other with
MAX1909
LDO
CLDO
1
μ
F
R1
10k
LDO
PKPRES
R2
70k
TEMP
THERMISTER
BATTERY
Figure 12. Use of a PTC Thermistor for Thermal Change
Qualification