參數(shù)資料
型號: MAX189ACPA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: +5V, Low-Power, 12-Bit Serial ADCs
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP8
封裝: 0.300 INCH, PLASTIC, DIP-8
文件頁數(shù): 17/20頁
文件大?。?/td> 177K
代理商: MAX189ACPA
M
+5V, Low-Power, 12-Bit S erial ADCs
______________________________________________________________________________________
17
SUPPLIES
+5V
GND
DGND
+5V
DIGITAL
CIRCUITRY
DGND
AGND
VDD
MAX187
MAX189
*OPTIONAL
R* = 10
4.7
μ
F
0.01
μ
F
The ADC results are transmitted across a 1500V isola-
tion barrier provided by three 6N136 opto-isolators.
Isolated power must be supplied to the converter and
the isolated side of the opto-couplers. 74HC595 three-
state shift registers are used to construct a 12-bit paral-
lel data output. The timing sequence is identical to the
timing shown in Figure 8. Conversion speed is limited
by the delay through the opto-isolators. With a 140kHz
clock, conversion time is 100μs.
The universal 12-bit parallel data output can also be
used without the isolation stage when a parallel inter-
face is required. Clock frequencies up to 2.9MHz are
possible without violating the 20ns shift-register setup
time. Delay or invert the clock signal to the shift regis-
ters beyond 2.9MHz.
Layout, Grounding, Bypassing
For best performance, use printed circuit boards. Wire-
wrap boards are not recommended. Board layout
should ensure that digital and analog signal lines are
separated from each other. Do not run analog and digi-
tal (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 17 shows the recommended system ground
connections. A single-point analog ground (“star”
ground point) should be established at GND, separate
from the logic ground. All other analog grounds should
be connected to this ground. The 16-pin versions also
have a dedicated DGND pin available. Connect DGND
to this star ground point for further noise reduction. No
other digital system ground should be connected to
this single-point analog ground. The ground return to
the power supply for this ground should be low imped-
ance and as short as possible for noise-free operation.
High-frequency noise in the V
power supply may
affect the ADC’s high-speed comparator. Bypass this
supply to the single-point analog ground with 0.01μF
and 4.7μF bypass capacitors. Minimize capacitor lead
lengths for best supply-noise rejection. If the +5V
power supply is very noisy, a 10
resistor can be con-
nected as a lowpass filter to attenuate supply noise
(Figure 17).
Figure 17. Power-Supply Grounding Condition
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