參數(shù)資料
型號(hào)： MAX1883EUP
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 穩(wěn)壓器
英文描述： Replaced by TMS320C6211B : Fixed-Point Digital Signal Processor 256-BGA 0 to 0
中文描述： 2.05 A SWITCHING REGULATOR, 1250 kHz SWITCHING FREQ-MAX, PDSO20
封裝： 4.40 MM, 1.10 MM HEIGHT, MO-153AC, TSSOP-20
文件頁(yè)數(shù)： 30/38頁(yè)
文件大?。?/td> 1051K
代理商： MAX1883EUP
M
Quad-Output TFT LCD DC-DC
Converters with Buffer
30
______________________________________________________________________________________
0.8μA (max). For less than 0.5% error due to FBL input
bias current (I
FBL
), R8 must be less than 8k
.
Capacitor Selection and Regulator Stability
Capacitors are required at the input and output of the
MAX1778/MAX1881/MAX1883/MAX1884 for stable
operation over the full temperature range and with load
currents up to 40mA. Connect a 1μF input bypass
capacitor (C
SUPL
) between SUPL and ground to lower
the source impedance of the input supply. Connect a
ceramic capacitor between LDOOUT and ground,
using the following equation to determine the lowest
value required for stable operation:
For example, with a 5V linear regulator output voltage
and a maximum 40mA load, use at least 4μF of output
capacitance. Applications that experience high-current
load pulses may require more output capacitance.
The ESR of the linear regulator
’
s output capacitor
(C
LDOOUT
) affects stability and output noise. Use out-
put capacitors with an ESR of 0.1
or less to ensure
stability and optimum transient response. Surface-
mount ceramic capacitors are good for this purpose.
Place C
SUPL
and C
LDOOUT
as close to the linear regu-
lator as possible to minimize the impact of PC board
trace inductance.
External Pass Transistor
For applications where the linear regulator currents
exceed 40mA or where the power dissipation in the IC
needs to be reduced, an external NPN transistor can
be used. In this case, the internal LDO only provides
the necessary base drive while the external NPN tran-
sistor supports the load, so most of the power dissipa-
tion occurs across the external transistor
’
s collector
and emitter.
Selection of the external NPN transistor is based on
three factors: the package
’
s power dissipation, the cur-
rent gain (
β
), and the collector-to-emitter saturation volt-
age (V
CE(SAT)
). First, the maximum power dissipation
should not exceed the transistor
’
s package rating:
=
Once the appropriate package type is selected, con-
sider the NPN transistor
’
s current gain. Since the inter-
nal LDO cannot source more than 40mA (min), the
transistor
’
s current gain must be high enough at the
lowest collector-to-emitter voltage to support the maxi-
mum output load:
For stable operation, place a capacitor (C
LDOOUT
) and
a minimum load resistor (R5) at the output of the inter-
nal linear regulator (the base of the external transistor)
to set the dominant pole:
Since the LDO cannot sink current, a minimum pull-
down resistor (R5) is required at the base of the NPN
transistor to sink leakage currents and improve the
high-to-low load-transient response. Under no-load
conditions, leakage currents from the internal pass
transistor supply the output capacitor (C
LDOOUT
), even
when the transistor is off. As the leakage currents
increase over temperature, charge may build up on
C
LDOOUT
, making the linear regulator
’
s output rise
above its set point. Therefore, R5 must sink at least
100μA to guarantee proper regulation. Additionally, the
minimum load current provided by R5 improves the
high-to-low load transients by lowering the impedance
seen by C
LDOOUT
after the transient occurs. Therefore,
if large load transients are expected, select R5 so that
the minimum load current is 10% of the transistor
’
s
maximum base current:
Alternatively, output capacitance placed on the external
linear regulator
’
s output (the emitter) adds a second pole
that could destabilize the regulator. A capacitive-divider
from the transistor
’
s base to the feedback input (C2 and
C3, Figure 7) circumvents this second pole by adding a
pole-zero pair. Furthermore, to minimize excessive over-
shoot, the capacitive-divider
’
s ratio must be the same as
the resistive-divider
’
s ratio. Once the output capacitor is
selected, using the following equations to determine the
required capacitive-divider values:
C
C
C
R
R
C
+
C
C
R
+
R
R
V
V
LDO
100
REF
LDO
2
3
1
4
3
2
2
3
4
3
4
+
+
≥
=
=
R
V
I
LDOOUT MIN
V
V
V
I
LDO
LDO
MIN
β
LOAD MAX
5
0 1
0 7
. (
0 7
)
(
)
(
)
=
=
C
ms
V
x
V
V
R
I
LDOOUT
LDO
LDO
LOAD MAX
β
MIN
0 5
0 7
5
+
(
)
≥
1
β
MIN
LOAD MAX
I
mA
mA
- 40
(
)
≥
40
P
V
V
COLLECTOR
LDO
LOAD MAX
(
) x I
(
)
C
ms X
I
V
LDOOUT
LDOOUT MAX
LDOOUT
0 5
(
)
≥
相關(guān)PDF資料
PDF描述
MAX1884EUP Fixed-Point Digital Signal Processor 256-BGA
MAX1885EUP Fixed-Point Digital Signal Processor 256-BGA
MAX1778EUG Quad-Output TFT LCD DC-DC Converters with Buffer
MAX1880EUG Quad-Output TFT LCD DC-DC Converters with Buffer
MAX1881EUG Quad-Output TFT LCD DC-DC Converters with Buffer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX1883EUP-T 功能描述:LCD 驅(qū)動(dòng)器 Quad-Output TFT LCD DC-DC Converter with Buffer RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
MAX1884EUP 功能描述:LCD 驅(qū)動(dòng)器 Quad-Output TFT LCD DC-DC Converter with Buffer RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
MAX1884EUP-T 功能描述:LCD 驅(qū)動(dòng)器 Quad-Output TFT LCD DC-DC Converter with Buffer RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
MAX1885EUP 功能描述:LCD 驅(qū)動(dòng)器 Quad-Output TFT LCD DC-DC Converter with Buffer RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
MAX1885EUP-T 功能描述:LCD 驅(qū)動(dòng)器 Quad-Output TFT LCD DC-DC Converter with Buffer RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
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