參數(shù)資料
型號(hào)： MAX186DMJP
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： ADC
英文描述： Low-Power, 8-Channel, Serial 12-Bit ADCs
中文描述： 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20
封裝： CERDIP-20
文件頁(yè)數(shù)： 13/24頁(yè)
文件大?。?/td> 245K
代理商： MAX186DMJP
Internal Clock
In internal clock mode, the MAX186/MAX188 generate
their own conversion clock internally. This frees the
microprocessor from the burden of running the SAR con-
version clock, and allows the conversion results to be
read back at the processor’s convenience, at any clock
rate from zero to typically 10MHz. SSTRB goes low at the
start of the conversion and then goes high when the con-
version is complete. SSTRB will be low for a maximum of
10μs, during which time SCLK should remain low for best
noise performance. An internal register stores data when
the conversion is in progress. SCLK clocks the data out
at this register at any time after the conversion is com-
plete. After SSTRB goes high, the next falling clock edge
will produce the MSB of the conversion at DOUT, fol-
lowed by the remaining bits in MSB-first format (see
Figure 9).
CS
does not need to be held low once a con-
version is started. Pulling
CS
high prevents data from
being clocked into the MAX186/MAX188 and three-
states DOUT, but it does not adversely effect an internal
clock-mode conversion already in progress. When inter-
nal clock mode is selected, SSTRB does not go into a
high-impedance state when
CS
goes high.
Figure 10 shows the SSTRB timing in internal clock
mode. In internal clock mode, data can be shifted in and
out of the MAX186/MAX188 at clock rates exceeding
4.0MHz, provided that the minimum acquisition time, t
AZ
,
is kept above 1.5μs.
M
Low-Power, 8-Channel,
S erial 12-Bit ADCs
______________________________________________________________________________________
13
t
SDV
t
SSTRB
PD0 CLOCKED IN
t
STR
SSTRB
SCLK
CS
t
SSTRB
SSTRB
CS
SCLK
DIN
DOUT
1
4
8
12
18
20
24
START
SEL2 SEL1 SEL0DIP
SCL/
B11
B9
B2
B1
B0
ACQUISITION
1.5μs (CLK = 2MHz)
IDLE
FILLED WITH
ZEROS
IDLE
CONVERSION
10μs MAX
A/D STATE
2
3
5
6
7
9
10
11
19
21
22
23
t
CONV
Figure 8. External Clock Mode SSTRB Detailed Timing
Figure 9. Internal Clock Mode Timing
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參數(shù)描述
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MAX186DMLP/883B 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX186DMLP/883B-W 制造商:Maxim Integrated Products 功能描述:LOW-POWER, 8-CHANNEL, SERIAL 12-BIT ADC W REF - Bulk
MAX186DMLP/M0A 制造商:Maxim Integrated Products 功能描述:LOW-POWER, 8-CHANNEL, SERIAL 12-BIT ADCS - Bulk
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