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參數(shù)資料
| 型號(hào)： | MAX186CEPP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | Low-Power, 8-Channel, Serial 12-Bit ADCs |
| 中文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 245K |
| 代理商： | MAX186CEPP |
M
Internal and External Cloc k Modes
The MAX186/MAX188 may use either an external serial
clock or the internal clock to perform the
successive-approximation conversion. In both clock
modes, the external clock shifts data in and out of the
MAX186/MAX188. The T/H acquires the input signal as
the last three bits of the control byte are clocked into
DIN. Bits PD1 and PD0 of the control byte program the
clock mode. Figures 7 through 10 show the timing
characteristics common to both modes.
External Clock
In external clock mode, the external clock not only shifts
data in and out, it also drives the analog-to-digital con-
version steps. SSTRB pulses high for one clock period
after the last bit of the control byte. Successive-approxi-
mation bit decisions are made and appear at DOUT on
each of the next 12 SCLK falling edges (see Figure 6).
SSTRB and DOUT go into a high-impedance state when
CS
goes high; after the next
CS
falling edge, SSTRB will
output a logic low. Figure 8 shows the SSTRB timing in
external clock mode.
The conversion must complete in some minimum time, or
else droop on the sample-and-hold capacitors may
degrade conversion results. Use internal clock mode if the
clock period exceeds 10μs, or if serial-clock interruptions
could cause the conversion interval to exceed 120μs.
Low-Power, 8-Channel,
S erial 12-Bit ADCs
12
______________________________________________________________________________________
SSTRB
CS
SCLK
DIN
DOUT
1
4
8
12
16
20
24
START
SEL2 SEL1 SEL0BIP
SCL/
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
ACQUISITION
1.5μs (CLK = 2MHz)
IDLE
FILLED WITH
ZEROS
IDLE
CONVERSION
t
ACQ
A/D STATE
RB1
RB2
RB3
CS
SCLK
DIN
DOUT
t
CSH
t
CSS
t
CL
t
DS
t
DH
t
DV
t
CH
t
DO
t
TR
t
CSH
Figure 6. 24-Bit External Clock Mode Conversion Timing (SPI, QSPI and Microwire Compatible)
Figure 7. Detailed Serial-Interface Timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX186CEPP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186CEWP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186CEWP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186CEWP+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186CEWP-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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