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參數(shù)資料
| 型號： | MAX186AMJP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | Fixed-Point Digital Signal Processor 384-FC/CSP |
| 中文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大小： | 245K |
| 代理商： | MAX186AMJP |
M
Low-Power, 8-Channel,
S erial 12-Bit ADCs
______________________________________________________________________________________
17
FULL
POWER-DOWN
POWERED
UP
POWERED UP
DATA VALID
DATA VALID
INTERNAL CLOCK MODE
S X X X X X 1 0
S
0 0
X
X
X
X
X
S
MODE
DOUT
DIN
CLOCK
MODE
SETS INTERNAL
CLOCK MODE
SETS FULL
POWER-DOWN
CONVERSION
CONVERSION
SSTRB
1
0 0
DIN
REFADJ
VREF
2.5V
0V
4V
0V
1
01
1
1
1
1
00
1
01
FULLPD
FASTPD
NOPD
FULLPD
FASTPD
2ms WAIT
COMPLETE CONVERSION SEQUENCE
t
BUFFEN
≈
15μs
τ
= RC = 20k
x C
REFADJ
(ZEROS)
CH1
CH7
(ZEROS)
Hardware Power-Down
The
SHDN
pin places the converter into the full
power-down mode. Unlike with the software shut-down
modes, conversion is not completed. It stops coinci-
dentally with
SHDN
being brought low. There is no
power-up delay if an external reference is used and is
not shut down. The
SHDN
pin also selects internal or
external reference compensation (see Table 7).
Power-Down S equenc ing
The MAX186/MAX188 auto power-down modes can
save considerable power when operating at less than
maximum sample rates. The following discussion illus-
trates the various power-down sequences.
Lowest Power at up to 500
Conversions/Channel/Second
The following examples illustrate two different power-down
sequences. Other combinations of clock rates, compen-
sation modes, and power-down modes may give lowest
power consumption in other applications.
Figure 14a depicts the MAX186 power consumption for
one or eight channel conversions utilizing full
power-down mode and internal reference compensation.
A 0.01μF bypass capacitor at REFADJ forms an RC filter
with the internal 20k
reference resistor with a 0.2ms
time constant. To achieve full 12-bit accuracy, 10 time
constants or 2ms are required after power-up. Waiting
2ms in FASTPD mode instead of full power-up will reduce
the power consumption by a factor of 10 or more. This is
achieved by using the sequence shown in Figure 13.
Figure 12b. Timing Diagram Power-Down Modes, Internal Clock
Figure 13. MAX186 FULLPD/FASTPD Power-Up Sequence
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX186AMJP-C01051 | 制造商:Maxim Integrated Products 功能描述:LOW-POWER, 8-CHANNEL, SERIAL 12-BIT ADCS - Rail/Tube |
| MAX186BCAP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186BCAP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186BCAP+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX186BCAP-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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