M
Dual, High-Efficiency, Step-Down
Controller with Accurate Current Limit
10
______________________________________________________________________________________
Standard Application Circuit
The standard application circuit (Figure 1) generates a
1.8V and a 2.5V rail for general-purpose use in note-
book computers.
See Table 1 for component selections. Table 2 lists
component manufacturers.
Detailed Description
The MAX1845 buck controller is designed for low-volt-
age power supplies for notebook computers. Maxim
’
s
proprietary Quick-PWM pulse-width modulator in the
MAX1845 (Figure 2) is specifically designed for han-
dling fast load steps while maintaining a relatively con-
stant operating frequency and inductor operating point
over a wide range of input voltages. The Quick-PWM
architecture circumvents the poor load-transient timing
problems of fixed-frequency current-mode PWMs while
avoiding the problems caused by widely varying
switching frequencies in conventional constant-on-time
and constant-off-time PWM schemes.
5V Bias Supply (V
CC
and V
DD
)
The MAX1845 requires an external 5V bias supply in
addition to the battery. Typically, this 5V bias supply is
the notebook
’
s 95% efficient 5V system supply.
Keeping the bias supply external to the IC improves
efficiency and eliminates the cost associated with the
5V linear regulator that would otherwise be needed to
supply the PWM circuit and gate drivers. If stand-alone
capability is needed, the 5V supply can be generated
with an external linear regulator such as the MAX1615.
The power input and 5V bias inputs can be connected
together if the input source is a fixed 4.5V to 5.5V sup-
ply. If the 5V bias supply is powered up prior to the bat-
tery supply, the enable signal (ON1, ON2) must be
delayed until the battery voltage is present to ensure
startup. The 5V bias supply must provide V
CC
and
gate-drive power, so the maximum current drawn is:
I
BIAS
= I
CC
+ f (Q
G1
+ Q
G2
) = 5mA to 30mA (typ)
where I
CC
is 1mA typical, f is the switching frequency,
and Q
G1
and Q
G2
are the MOSFET data sheet total
gate-charge specification limits at V
GS
= 5V.
Free-Running, Constant-On-Time PWM
Controller with Input Feed-Forward
The Quick-PWM control architecture is a pseudo-fixed-
frequency, constant-on-time current-mode type with
voltage feed-forward (Figure 3). This architecture relies
on the output filter capacitor
’
s effective series resis-
tance (ESR) to act as a current-sense resistor, so the
output ripple voltage provides the PWM ramp signal.
The control algorithm is simple: the high-side switch on-
PIN
QSOP
QFN
NAME
FUNCTION
—
23
AGND
Analog Ground. Serves as negative input for CS_ amplifiers. Connect backside pad to AGND.
—
24
PGND
Power Ground
24
26
DL1
Low-Side Gate-Driver Output for OUT1. DL1 swings from PGND to V
DD
.
25
27
BST1
Boost Fl yi ng C ap aci or C onnecti on for O U T1. C onnect to an exter nal cap aci or and d od e accor d ng
to the stand ar d ap p cati on ci cui i n Fi g ur e 1. S ee the
M OS FE T G ate D ver s ( D H _, D L_)
secti on.
26
28
DH1
High-Side Gate Driver Output for OUT1. Swings from LX1 to BST1.
27
30
LX1
External Inductor Connection for OUT1. Connect to the switched side of the inductor. LX1 serves
as the internal lower supply voltage rail for the DH1 high-side gate driver.
28
31
CS1
Current-Sense Input for OUT1. CS1 is the input to the current-limiting circuitry for valley current
limiting. For lowest cost and highest efficiency, connect to LX1. For highest accuracy, use a sense
resistor. See the
Current-Limit Circuit (ILIM_)
section.
—
6, 9, 10,
17, 25,
29, 36
N.C.
No Connection
Pin Description (continued)