M
Dynamically-Adjustable, Synchronous Step-Down
Controller with Integrated Voltage Positioning
18
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only a minor dependence on the input voltage:
where K is the on-time scale factor (Table 3). The load-
current level at which PFM/PWM crossover occurs
(I
LOAD(SKIP)
) is equal to 1/2 the peak-to-peak ripple
current, which is a function of the inductor value (Figure
3). For example, in the standard application circuit with
K = 3.3μs (300kHz), V
IN
= 12V, V
OUT
= 1.4V, and L =
0.68μH, switchover to pulse-skipping operation occurs
at I
LOAD
= 3.0A or about 1/4 full load. The crossover
point occurs at an even lower value if a swinging (soft-
saturation) inductor is used.
The switching waveforms may appear noisy and asyn-
chronous when light loading causes pulse-skipping
operation; this is a normal operating condition that
improves light-load efficiency. Trade-offs in PFM noise
vs. light-load efficiency are made by varying the induc-
tor value. Generally, low inductor values produce a
broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the
coil resistance remains fixed) and less output voltage
ripple. Penalties for using higher inductor values
include larger physical size and degraded load-tran-
sient response (especially at low input voltage levels).
Forced-PWM Mode
The low-noise, forced-PWM mode (SKP/
SDN
left float-
ing, Table 4) disables the zero-crossing comparator
that controls the low-side switch on-time. The resulting
low-side gate-drive waveform is forced to be the com-
plement of the high-side gate-drive waveform. This, in
turn, causes the inductor current to reverse at light
loads because the PWM loop strives to maintain a duty
ratio of V
OUT
/V
IN
. The benefit of forced-PWM mode is
to keep the switching frequency nearly constant, but it
results in higher no-load supply current that can be
15mA to 45mA, depending on the external MOSFETs
and switching frequency.
The MAX1813 uses forced-PWM mode during all transi-
tions, while the slew-rate controller is active. During
downward output voltage transitions, forced-PWM
allows the MAX1813 to sink current, thereby rapidly
pulling down the output voltage. When a transition uses
high negative inductor current, due to voltage position-
ing, the output voltage may not settle to its intended
final value until after the slew-rate controller terminates.
For this reason, most applications should use PWM
mode exclusively, although skip mode is beneficial in
the low-power suspend state (see
Shutdown and Mode
Control
).
Shutdown and Mode Control (SKP/
SDN
)
When SKP/
SDN
is driven low, the MAX1813 enters the
low-current shutdown mode (Table 4). Shutdown forces
PGOOD low immediately and ramps down the output
voltage in 25mV increments at the clock rate set by
R
TIME
. Once the output voltage ramps down, the
MAX1813 pulls DH low, forces DL high, and shuts
down the reference, so the total supply current (I
CC
+
I
DD
+ I+) drops to 4μA (typ).
When SKP/
SDN
is left floating or driven high, the
MAX1813 begins the startup sequence. First, the refer-
ence powers up. After the reference exceeds its 1.6V
undervoltage lockout threshold, the DAC determines
the target output voltage and starts ramping up the out-
put voltage. The slew-rate controller increases the out-
I
K
V
2L
V
V
V
LOAD(SKIP)
OUT
IN
OUT
IN
≈
SKP/
SDN
GND
DL
High
MODE
Shutdown
COMMENTS
Micropower shutdown state (I
CC
= 2
μ
A typ).
Automatic switchover from PWM mode to pulse-skipping PFM mode at
light loads. Prevents inductor current from recirculating into the input.
V
CC
Switching
Normal
Operation
Float
Switching
Forced PWM
Low-noise forced-PWM mode causes inductor current to reverse at
light loads and suppresses pulse-skipping operation.
12V
Switching
NO-FAULT Test
Mode
Test mode with overvoltage, undervoltage, and thermal shutdown
faults disabled. Otherwise, the converter operates as if SKP/
SDN
=
V
CC
.
V
CC
or Float
High
FAULT
The fault latch set by the overvoltage protection, output undervoltage
protection, or thermal shutdown. The MAX1813 will remain in FAULT
mode until V
CC
power is cycled or SKP/
SDN
is forced low.
Table 4. Operating Mode Truth Table