M
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
14
______________________________________________________________________________________
Careful layout of the current-sense signal traces is
imperative. Place R1 as close to the MAX1775 as pos-
sible. The two traces should have matching length and
width, be as far as possible from noisy switching sig-
nals, and be close together to improve noise rejection.
These traces should be used for current-sense signal
routing only and should not carry any load current.
Refer to the MAX1775 Evaluation Kit for layout exam-
ples.
Inductor Selection
The essential parameters for inductor selection are
inductance and current rating. The MAX1775 operates
with a wide range of inductance values.
Calculate the inductance value for either core or main,
L
MIN
:
L
MIN
= (V
IN
- V
OUT
)
T
ONMIN
/ I
RIPPLE
where T
ONMIN
is typically 400ns, and I
RIPPLE
is the
continuous conduction ripple current. In continuous
conduction, I
RIPPLE
should be chosen to be 30% of the
maximum load current. With high inductor values, the
MAX1775 begins continuous-conduction operation at a
lower fraction of full load (see
Detailed Description
).
The inductor
’
s saturation current must be greater than
the peak switching current to prevent core saturation.
Saturation occurs when the inductor
’
s magnetic flux
density reaches the maximum level the core can sup-
port, and inductance starts to fall. The inductor heating
current rating must be greater than the maximum load
current to prevent overheating. For optimum efficiency,
the inductor series resistance should be less than the
current-sense resistance.
Capacitor Selection
Choose output filter capacitors to service the output rip-
ple current with acceptable voltage ripple. ESR in the
output capacitor is a major contributor to output ripple.
For the main converter, low-ESR capacitors such as
polymer, ceramic, or even tantalum are recommended.
For the core converter, choosing a low-ESR tantalum
capacitor with enough ESR to generate about 1% ripple
voltage across the output is helpful in ensuring stability.
Voltage ripple is the sum of contributions from ESR and
the capacitor value:
V
RIPPLE
≈
V
RIPPLE
,
ESR
+ V
RIPPLE
,
C
For tantalum capacitors, the ripple is determined mostly
by the ESR. Voltage ripple due to ESR is:
V
RIPPLE
,
ESR
≈
R
ESR
I
RIPPLE
For ceramic capacitors, the ripple is mostly due to the
capacitance. The ripple due to the capacitance is
approximately:
V
RIPPLE,C
≈
L I
RIPPLE
2
/ 2C
OUT
V
OUT
where V
OUT
is the average output voltage. From this
equation, estimate the output capacitor values for given
voltage ripple as follows:
C
OUT
= 1/2
L I
RIPPLE
2
/ (V
RIPPLE
,
COUT
V
OUT)
This equation is suitable for initial capacitor selection.
Final values should be set by testing a prototype or evalu-
ation kit. When using tantalum capacitors, use good sol-
dering practices to prevent excessive heat from
damaging the devices and increasing their ESR. Also,
ensure that the tantalum capacitors
’
surge-current ratings
exceed the startup inrush and peak switching currents.
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple at IN, caused by the circuit
’
s switching. Use a
low-ESR capacitor. Two smaller-value low-ESR capaci-
tors can be connected in parallel if necessary. Choose
input capacitors with working voltage ratings higher
than the maximum input voltage. Typically 4μF of input
capacitance for every 1A of load current is sufficient.
More capacitance may improve battery life and noise
immunity.
Place a surface-mount ceramic capacitor at IN very close
to the source of the high-side P-channel MOSFET. This
capacitor bypasses the MAX1775, minimizing the effects
of spikes and ringing on the MAX1775
’
s operation.
Bypass REF with 0.22μF or greater. Place this capacitor
within 0.2in (5mm) of the IC, next to REF, with a direct
trace to GND.
MOSFET Selection
The MAX1775 drives an external enhancement-mode
P-channel MOSFET and a synchronous-rectifier N-
channel MOSFET. When selecting the MOSFETs,
important parameters to consider are on-resistance
(R
DS(ON)
), maximum drain-to-source voltage
(V
DS(MAX)
), maximum gate-to-source voltage
(V
GS(MAX)
), and minimum threshold voltage (V
TH(MIN)
).
Chip Information
TRANSISTOR COUNT: 3530
PROCESS: BiCMOS