M
Power Source Selector for
Dual-Battery Systems
16
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If BATSEL is returned to its original state within the
BATSEL Action Delay, then changes to the connection
states are never made. Note that in the Standard
Battery States mode and in the AC Adapter States
mode when one or both batteries are present, both
BATSTAT and the connection states are delayed during
the BATSEL Update Delay.
MOSFET Drivers
To minimize the time when no supply is connected to
the external load during switchover transients, the
MAX1773/MAX1773A use active pullup drivers for the
discharge paths (DIS_) and the common paths
(COM_). When the MAX1773/MAX1773A initially begin
to pull up one of these pins, they use a large current
(Initial COM_ Source Current and Initial DIS_ Source
Current; see
Electrical Characteristics
). Once the
COM_ voltage rises to within 2V of V
BAT_
or the DIS_
voltage rises to within 2V of V
EXTLD,
then a weaker dri-
ver is used to hold up the voltage (Final COM_ Source
Current and Final DIS_ Source Current; see
Electrical
Characteristics
).
The MAX1773/MAX1773A are designed to prevent
shoot-through from one battery to the other when transi-
tioning from discharging one battery to discharging the
other battery. To accomplish this, the MAX1773/
MAX1773A do not connect the second battery to
EXTLD until it senses that the first battery is disconnect-
ed from EXTLD. See Notes 4 and 5 of
Electrical
Characteristics
.
To allow flexibility when choosing the higher voltage
PDS PMOS FET (P7, Figure 10), the MAX1773/
MAX1773A do not limit the gate-to-source voltage
applied to the PDS PMOSFET. The minimum V
GS
is set
by the MAX1773/MAX1773A PDS sink current (see
Electrical Characteristics
) and the external resistor from
PDS to EXTLD (R13):
V
GS(MIN)
= -I
PDS(SINK)
R
PDS
where V
GS(MIN)
is the minimum P7 gate-to-source
voltage, I
PDS(SINK)
is the PDS sink current, and R
PDS
is
R13.
The MAX1773/MAX1773A use open-collector drivers to
open the charge paths. Minimize the value of the pullup
resistors on the charge paths (R12 and R14) to allow
the MAX1773/MAX1773A to quickly turn on the PMOS
FETs; however, keep the value large enough to prevent
a lower V
GS
than specified by the PMOS FET. The mini-
mum V
GS
is:
V
GS(MIN)
= -I
CHG_(SINK)
R
CHG_
where V
GS(MIN)
is the minimum P1 or P4 gate-to-source
voltage, I
CHG_(SINK)
is the CHG_ sink current (see
Electrical Characteristics
), and R
CHG_
is R12 or R14.
V
DD
Regulator
The MAX1773/MAX1773A feature an internal linear reg-
ulator to provide power for itself and external circuitry.
The linear regulator
’
s output is available at V
DD
and is
nominally 3.3V. When the linear regulator is not used to
power external circuitry, bypass it with a 0.33μF ceram-
ic capacitor. To supply external loads up to 1mA,
bypass the linear regulator with a 3.3μF tantalum
capacitor.
Applications Information
Load Switchover Transients
When power switches from one power source to anoth-
er, a transient is created on the load. This transient
(
V
EXTLD
) is minimized by the capacitance on the load
(C
EXTLD
). The voltage transient can be approximated
as:
i
EXTLD
=
where t
SWITCHOVER
is the time where no supply is con-
nected to the EXTLD.
V
t
C
EXLTLD
SWITCHOVER
EXTLD
×
MODE
STATUS
BATSTAT
1
1
BATSEL
BATSEL
BATSEL
BATSEL
ACPRES
1
1
1
1
0
0
All
Startup States
Standard Battery States
Standard Battery States
AC Adapter States
AC Adapter States
V
DD
Undervoltage Lockout
Selected Battery Discharge Path Connected
Other Battery Discharge Path Connected
Selected Battery Charge Path Connected
Selected Battery Absent
Table 4. Status Bits