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參數(shù)資料
| 型號(hào)： | MAX1755BAUT-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SOT23 Local Temperature Comparators with SMBus Serial Interface |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO6 |
| 封裝： | SOT-23, 6 PIN |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 294K |
| 代理商： | MAX1755BAUT-T |
M
SOT23 Local Temperature Comparators
with SMBus Serial Interface
_______________________________________________________________________________________
7
OVERT
Thermostat Output
(MAX1755)
The
OVERT
output is a self-clearing interrupt output
that is activated when the current temperature equals
or exceeds T
MAX
.
OVERT
normally goes low when
active, but this polarity can be changed through the
POLARITY bit in the T
MAX
register. The latch is cleared
when the current temperature reading is equal to or
less than the current T
MAX
value minus 4
°
C, which pro-
vides for 4
°
C of hysteresis ( Figure 4).
ALERT
Interrupt (MAX1756)
The
ALERT
interrupt output signal is latched and can
only be cleared by reading the status register or writing
a new T
MAX
value. Interrupts are generated when the
device temperature goes above the current T
MAX
DAC
setting or below the current DAC setting minus 8
°
C
(T
HYST
). The POR state masks undertemperature inter-
rupts (see Figure 4).
Status Register
The bit functions for the status register are summarized
in Table 2. The OVER bit (MSB) indicates when the
T
MAX
threshold is crossed. The UNDER bit (B6) indi-
cates when the T
HYST
threshold is crossed. For the
MAX1755, the UNDER bit is not masked during POR; if
the die temperature is less than 96
°
C, this bit asserts.
For the MAX1756, the UNDER bit is masked to zero
during POR. OVER and UNDER are cleared by any
read or write operations. In the MAX1755, the OUTPUT
bit (B5) mirrors the state of the
OVERT
signal. The OUT-
PUT bit is not used in the MAX1756 and returns zero.
The
DEFAULT
bit (B1) indicates that the DAC is at the
default value. This condition implies that the POR
threshold was crossed. The
DEFAULT
bit is cleared
using a Send Byte operation. The ERROR bit (LSB)
indicates that the UVLO threshold was crossed, and
therefore the conversion is inaccurate. Use a Send Byte
operation and make sure that V
CC
is in the valid operat-
ing range to clear this bit. The remaining bits in the sta-
tus register (B4, B3, B2) are reserved for future use.
Slave Addresses
The MAX1755/MAX1756 appear to the SMBus as one
address for both reads and writes. The device address
can be set to one of three different values by pin-strap-
ping ADD, so up to six ICs can reside on the same bus
without address conflicts (Table 3). A test for the cur-
rent state of the address pins is done at POR and when
exiting standby mode. The results of this test are
latched as the current address. This scheme allows for
the use of three-way pin-strapping to set the address
(V
CC
, GND, floating).
Table 1. T
MAX
Register Data Format (Two
’
s Complement)
DAC REGISTER VALUE
MASK/POLARITY
BIT POR STATE
MASK OR
POLARITY
SIGN
MSB
LSB
NOMINAL TEMPERATURE
THRESHOLD (
°
C)
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
1 / 0
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
1
1
1
1
111111
111110
110010
001100
000001
000000
111111
111110
101100
100101
+126
+124
+100 (POR State)
+24
+2
0
-2
-4
-40
-54
-54
-54
Standby Mode
Between (X 1 100101) and (X 1 000001)
1
1
X
X
000001
000000
POLARITY bit:
0 =
OVERT
is active low; 1 =
OVERT
is active high (MAX1755).
MASK bit:
A logic 1 disables T
HYST
(negative-going) interrupts (MAX1756).
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