參數(shù)資料
型號(hào): MAX1717EEG
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: Replaced by TMS320VC5506 : Digital Signal Processors 100-LQFP
中文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO24
封裝: 0.150 INCH, 0.025 INCH PITCH, MO-137AC, QSOP-24
文件頁(yè)數(shù): 20/32頁(yè)
文件大?。?/td> 501K
代理商: MAX1717EEG
M
Dynamically Adjustable, Synchronous
Step-Down Controller for Notebook CPUs
20
______________________________________________________________________________________
voltages. The internal mux is controlled with the A/
B
pin,
which selects between the A mode and the B mode. In
the A mode, the voltage levels on D0–D4 select the out-
put voltage according to Table 4. Do not leave D0–D4
floating; there are no internal pull-up resistors.
The B mode is programmed by external resistors in
series with D0–D4, using a unique scheme that allows
two sets of data bits using only one set of pins (Figure
7). When A/
B
goes low (or during power-up with A/
B
low), D0–D4 are tested to see if there is a large resis-
tance in series with the pin. If the voltage level on the
pin is a logic low, an internal switch connects the pin to
an internal 40k
pull-up for about 4μs to see if the pin
voltage can be forced high (Figure 8). If the pin voltage
cannot be pulled to a logic high, the pin is considered
low impedance and its B-mode logic state is low. If the
pin can be pulled to a logic high, the impedance is
considered high and so is the B-mode logic state.
Similarly, if the voltage level on the pin is a logic high,
an internal switch connects the pin to an internal 8k
pull-down to see if the pin voltage can be forced low. If
so, the pin is high-impedance and its B-mode logic
state is high. Otherwise, its logic state is low.
A high pin impedance (and logic high) is 100k
or
greater, and a low impedance (and logic low) is 1k
or
less. The
Electrical Characteristics
table guaranteed lev-
els for these impedances are 95k
and 1.05k
to allow
the use of standard 100k
and 1k
resistors with 5% tol-
erance.
If the output voltage codes are fixed at PC board
design time, program both codes with a simple combi-
nation of pin-strap connections and series resistors
(Figure 7). If the output voltage codes are chosen dur-
ing PC board assembly, both codes can be indepen-
dently programmed with resistors (Figure 9). This
matrix of 10 resistor-footprints can be programmed to all
possible A-mode and B-mode code combinations with
only five resistors.
Often, one or more output-voltage codes are provided
directly by the CPU’s VID pins. If the CPU actively dri-
ves these pins, connect A/
B
high (A mode) and let the
CPU determine the output voltages. If the B mode is
needed for startup or other reasons, insert resistors in
series with D0–D4 to program the B-mode voltage. Be
sure that the VID pins are actively driven at all times.
If the CPU’s VID pins float, the open-circuit pins can
present a problem for the MAX1717’s internal mux. The
processor’s VID pins can be used for the A-mode set-
ting, together with suitable pull-up resistors. However,
the B-mode VID code is set with resistors in series with
D0–D4, and in order for the B-mode to work, any pins
intended to be B-mode logic low must appear to be low
impedance, at least for the 4μs sampling interval.
This can be achieved in several ways, including the fol-
lowing two (Figure 10). By using low-impedance pull-up
resistors with the CPU’s VID pins, each pin provides the
low impedance needed for the mux to correctly inter-
pret the B-mode setting. Unfortunately, the low resis-
tances cause several mA additional quiescent current
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
V
OUT
(V)
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
No CPU
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
No CPU
Table 4. Output Voltage vs. DAC Codes
Note:
In the no-CPU state, DH and DL are held low and the
slew-rate controller is set for 0.9V.
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