M
Ultra-High Efficiency, Dual Step-Down
Controller for Notebook Computers
______________________________________________________________________________________
15
operation, but this is a normal operating condition that
results in high light-load efficiency. Trade-offs in PFM
noise vs. light-load efficiency are made by varying the
inductor value. Generally, low inductor values produce
a broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the
coil resistance remains fixed) and less output voltage
ripple. Penalties for using higher inductor values
include larger physical size and degraded load-tran-
sient response (especially at low input voltage levels).
DC output accuracy specifications refer to the trip level of
the error. When the inductor is in continuous conduction,
the output voltage will have a DC regulation higher than
the trip level by 50% of the ripple. In discontinuous con-
duction (
SKIP
= AGND, light-loaded), the output voltage
will have a DC regulation higher than the trip level by
approximately 1.5% due to slope compensation.
Forced-PWM Mode (
SKIP
= high)
The low-noise, forced-PWM mode (
SKIP
= high) dis-
ables the zero-crossing comparator, which controls the
low-side switch on-time. This causes the low-side gate-
drive waveform to become the complement of the high-
side gate-drive waveform. This in turn causes the
inductor current to reverse at light loads as the PWM
loop strives to maintain a duty ratio of V
OUT
/V
IN
. The
benefit of forced-PWM mode is to keep the switching
frequency fairly constant, but it comes at a cost: the no-
load battery current can be 10mA to 40mA, depending
on the external MOSFETs.
Forced-PWM mode is most useful for reducing audio-
frequency noise, improving load-transient response,
providing sink-current capability for dynamic output
voltage adjustment, and improving the cross-regulation
of multiple-output applications that use a flyback trans-
former or coupled inductor.
Current-Limit Circuit (ILIM)
The current-limit circuit employs a unique “valley” current-
sensing algorithm that uses the on-state resistance of the
low-side MOSFET as a current-sensing element. If the
current-sense signal is above the current-limit threshold,
the PWM is not allowed to initiate a new cycle (Figure 5).
The actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple cur-
rent. Therefore, the exact current-limit characteristic and
maximum load capability are a function of the MOSFET
on-resistance, inductor value, and battery voltage. The
reward for this uncertainty is robust, lossless overcurrent
sensing. When combined with the undervoltage protec-
tion circuit, this current-limit method is effective in almost
every circumstance.
There is also a negative current limit that prevents exces-
sive reverse inductor currents when V
OUT
is sinking cur-
rent. The negative current-limit threshold is set to
approximately 120% of the positive current limit, and
therefore tracks the positive current limit when ILIM is
adjusted.
The current-limit threshold is adjusted with internal 5μA
current source and an external resistor at ILIM. The
current-limit threshold adjustment range is from 50mV
to 200mV, corresponding to resistor values of 100k
to
400k
. In the adjustable mode, the current-limit thresh-
old voltage is precisely 1/10 the voltage seen at ILIM.
The threshold defaults to 100mV when ILIM is connect-
ed to V
CC
. The logic threshold for switchover to the
100mV default value is approximately V
CC
- 1V.
The adjustable current limit accommodates MOSFETs
with a wide range of on-resistance characteristics (see
Design Procedure
).
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors don’t corrupt the cur-
rent-sense signals seen by LX and PGND. Mount or
Figure 4. Pulse-Skipping/Discontinuous Crossover Point
I
I
LOAD
= I
PEAK
/2
ON-TIME
0
TIME
-I
PEAK
L
V
BATT
-V
OUT
i
t
=
Figure 5. ‘‘Valley’’ Current-Limit Threshold Point
I
I
LIMIT
I
LOAD
0
TIME
-I
PEAK