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參數(shù)資料
| 型號(hào)： | MAX1712 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs |
| 中文描述： | 高速、數(shù)字可調(diào)、降壓型控制器，用于筆記本電腦 |
| 文件頁數(shù)： | 9/28頁 |
| 文件大小： | 437K |
| 代理商： | MAX1712 |
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M
High-Speed, Digitally Adjusted
Step-Down Controllers for Notebook CPUs
_______________________________________________________________________________________
9
Standard Application Circuit
The standard application circuit (Figure 1) generates a
low-voltage, high-power rail for supplying up to 7A to the
core CPU V
CC
in a notebook computer. This DC-DC
converter steps down a battery or AC adapter voltage to
sub-2V levels with high efficiency and accuracy, and
represents a good compromise between size, efficiency,
and cost.
See the MAX1710 EV kit manual for a list of components
and suppliers.
Detailed Description
The MAX1710/MAX1711/MAX1712 buck controllers are
targeted for low-voltage, high-current CPU power sup-
plies for notebook computers. CPU cores typically exhib-
it 0A to 10A or greater load steps when the clock is
throttled. The proprietary Quick-PWM pulse-width modu-
lator in the MAX1710/MAX1711/MAX1712 is specifically
designed for handling these fast load steps while main-
taining a relatively constant operating frequency and
inductor operating point over a wide range of input volt-
ages. The Quick-PWM architecture circumvents the poor
load-transient timing problems of fixed-frequency cur-
Pin Description (continued)
NAME
FUNCTION
16
(MAX1711/
MAX1712)
D4
DAC Code Input, MSB. 5μA internal pullup to V
CC
(Tables 1, 2, and 3).
PIN
13
DL
Low-Side Gate-Driver Output, swings 0 to V
DD
Power Ground. Also used as the inverting input for the current-limit comparator.
12
PGOOD
Open-Drain Power-Good Output
11
GNDS
Ground Remote-Sense Input, normally connected to ground directly at the load. GNDS internally con-
nects to the integrator that fine tunes the ground offset voltage.
10
GND
Analog Ground
14
PGND
15
V
DD
Supply Voltage Input for the DL Gate Driver, 4.5V to 5.5V
17
D3
DAC Code Input. 5μA internal pullup to V
CC
.
DAC Code Input. 5μA internal pullup.
16
(MAX1710)
OVP
Overvoltage-Protection Disable Control Input (Table 4). GND = normal operation and overvoltage
protection active, V
CC
= overvoltage protection disabled.
22
BST
Boost Flying-Capacitor Connection. An optional resistor in series with BST allows the DH pullup
current to be adjusted (Figure 5). This technique of slowing the LX rise time can be used to prevent
accidental turn-on of the low-side MOSFET due to excessive gate-drain capacitance.
21
SKIP
Low-Noise-Mode Selection Control Input. Low-noise forced-PWM mode causes inductor current
recirculation at light loads and suppresses pulse-skipping operation. Normal operation prevents
current recirculation.
SKIP
can also be used to disable both overvoltage and undervoltage protection
circuits and clear the fault latch (Figure 6). GND = normal operation, V
CC
= low-noise mode.
Do not
leave
SKIP
floating
.
20
D0
DAC Code Input LSB. 5μA internal pullup.
19
D1
DAC Code Input. 5μA internal pullup.
18
D2
24
DH
High-Side Gate-Driver Output. Swings LX to BST.
23
LX
Inductor Connection. LX serves as the lower supply rail for the DH high-side gate driver. Also used
for the noninverting input to the current-limit comparator, as well as the skip-mode zero-crossing com-
parator.
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