參數(shù)資料
型號: MAX1711EEG
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs
中文描述: SWITCHING CONTROLLER, 550 kHz SWITCHING FREQ-MAX, PDSO24
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-24
文件頁數(shù): 25/28頁
文件大?。?/td> 299K
代理商: MAX1711EEG
M
High-S peed, Digitally Adjusted
S tep-Down Controllers for Notebook CPUs
______________________________________________________________________________________
25
D1
Q2
V
BATT
GND IN
COUT
VIA TOFB
NEAR COUT+
VIA TOLX
VIA TOSOURCE
OF Q2
VIA TOPGND
NEAR Q2 SOURCE
INDUCTOR DISCHARGE PATH HAS LOW DC RESISTANCE
VIA TOFBS
VIA TOGNDS
GND
OUT
V
OUT
L1
Q1
CC
V
CC
V
DD
REF
GND
ALL ANALOG GROUNDS
CONNECT TOGND ONLY
NOTES:
"STAR" GROUND IS USED.
D1 IS DIRECTLY ACROSS Q2.
CONNECT GND TOPGND
BENEATH IC, 1 POINT ONLY.
SPLIT ANALOG GND PLANE AS SHOWN.
I
LIM
MAX1710
MAX1711
CIN
Figure 11. Power-Stage PC Board Layout Example
Keep the power traces and load connections short.
This practice is essential for high efficiency. The use
of thick copper PC boards (2 oz. vs. 1 oz.) can en-
hance full-load efficiency by 1% or more. Correctly
routing PC board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
LX and PGND connections to Q2 for current limiting
must be made using Kelvin sense connections in
order to guarantee the current-limit accuracy. With
SO-8 MOSFETs, this is best done by routing power to
the MOSFETs from outside using the top copper
layer, while tying in PGND and LX inside (underneath)
the SO-8 package.
When trade-offs in trace lengths must be made, it’s
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it’s better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-side
MOSFET or between the inductor and the output filter
capacitor.
Ensure that the FB connection to C
OUT
is short and
direct. However, in some cases it may be desirable to
deliberately introduce some trace length between the
FB inductor node and the output filter capacitor (see
the All-Ceramic-Capacitor Application section).
Route high-speed switching nodes away from sensi-
tive analog areas (CC, REF, ILIM).
Make all pin-strap control input connections (
SKIP
,
ILIM, etc.) to GND or V
CC
rather than PGND or V
DD
.
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