- 您現在的位置：買賣IC網 > PDF目錄9901 > MAX159AEUA+ (Maxim Integrated Products)IC ADC 10BIT 108KSPS 8-UMAX PDF資料下載
參數資料
| 型號： | MAX159AEUA+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 14/16頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 108KSPS 8-UMAX |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 50 |
| 位數： | 10 |
| 采樣率（每秒）： | 108k |
| 數據接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 330mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-uMAX |
| 包裝： | 管件 |
| 輸入數目和類型： | 1 個偽差分，單極 |
MAX157/MAX159
+2.7V, Low-Power, 2-Channel,
108ksps, Serial 10-Bit ADCs in 8-Pin MAX
_______________________________________________________________________________________
7
Detailed Description
The MAX157/MAX159 analog-to-digital converters
(ADCs) use a successive-approximation conversion
(SAR) technique and on-chip track/hold (T/H) structure
to convert an analog signal to a serial, 10-bit digital out-
put data stream.
This flexible serial interface provides easy interface to
microprocessors (Ps). Figure 2 shows a simplified
functional diagram of the internal architecture for both
the MAX157 (2 channels, single-ended) and the
MAX159 (1 channel, pseudo-differential).
Single-Ended (MAX157) and Pseudo-
Differential (MAX159) Analog Inputs
The sampling architecture of the ADC’s analog com-
parator is illustrated in the equivalent input circuit in
Figure 3. In single-ended mode (MAX157), both chan-
nels CH0 and CH1 are referred to GND and can be
connected to two different signal sources. Following the
power-on reset, the ADC is set to convert CH0. After
CH0 has been converted, CH1 will be converted, and
the conversions will continue to alternate between
channels. Channel switching is performed by toggling
the CS/SHDN pin. Conversions can be performed on
the same channel by toggling CS/SHDN twice between
conversions. If only one channel is required, CH0 and
CH1 may be connected together; however the output
data will still contain the channel identification bit
(before the MSB).
For the MAX159, the input channels form a single differ-
ential channel pair (CH+, CH-). This configuration is
pseudo-differential to the effect that only the signal at
IN+ is sampled. The return side IN- must remain stable
within ±0.5LSB (±0.1LSB for optimum results) with
respect to GND during a conversion. To accomplish
this, connect a 0.1F capacitor from IN- to GND.
During the acquisition interval, the channel selected as
the positive input (IN+) charges capacitor CHOLD. The
acquisition interval spans from when CS/SHDN falls to
the falling edge of the second clock cycle (external
clock mode) or from when CS/SHDN falls to the first
falling edge of SCLK (internal clock mode). At the end
of the acquisition interval, the T/H switch opens, retain-
ing charge on CHOLD as a sample of the signal at IN+.
The conversion interval begins with the input multiplex-
er switching CHOLD from the positive input (IN+) to the
negative input (IN-). This unbalances node ZERO at the
comparator’s positive input.
6k
CL
DOUT
a) HIGH-Z TO V0H, V0L TO V0H, AND VOH TO HIGH-Z
6k
CL
DOUT
GND
VDD
b) HIGH-Z TO V0L, V0H TO V0L, AND VOL TO HIGH-Z
Figure 1. Load Circuits for Enable and Disable Time
Pin Description
NAME
FUNCTION
1
VDD
Positive Supply Voltage, +2.7V to +5.25V
2
CH0 (CH+)
Analog Input, MAX157: Single-Ended (CH0); MAX159: Differential (CH+).
PIN
3
CH1 (CH-)
Analog Input, MAX157: Single-Ended (CH1); MAX159: Differential (CH-).
4
GND
Analog and Digital Ground
8
SCLK
Serial Clock Input. DOUT changes on the falling edge of SCLK.
7
DOUT
Serial Data Output. Data changes state at SCLK’s falling edge. High impedance when CS/SHDN is high.
6
CS/SHDN
Active-Low Chip-Select Input, Active-High Shutdown Input. Pulling CS/SHDN high puts chip into
shutdown with a maximum current of 5A.
5
REF
External Reference Voltage Input. Sets analog voltage range. Bypass with a 100nF capacitor close to the
part.
相關PDF資料 |
PDF描述 |
|---|---|
| VE-J2N-MX-F2 | CONVERTER MOD DC/DC 18.5V 75W |
| IDT72V36100L7-5PFI | IC FIFO 64X36 7-5NS 128QFP |
| VE-J2N-MX-F1 | CONVERTER MOD DC/DC 18.5V 75W |
| V48A36T500BF2 | CONVERTER MOD DC/DC 36V 500W |
| VE-J2M-MX-F4 | CONVERTER MOD DC/DC 10V 75W |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MAX159AEUA+ | 功能描述:模數轉換器 - ADC 10-Bit 108ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX159AEUA+T | 功能描述:模數轉換器 - ADC 10-Bit 108ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX159AEUA-T | 功能描述:模數轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX159BCPA | 功能描述:模數轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX159BCPA+ | 功能描述:模數轉換器 - ADC 10-Bit 108ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復。