M
High-Efficiency, 5x Output, Main Power-Supply
Controllers for Notebook Computers
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13
Pin Description
PIN
MAX1533
MAX1537
NAME
FUNCTION
—
1
ADJA
Auxiliary Feedback Input. Connect a resistive voltage-divider from LDOA to analog
ground to adjust the auxiliary linear-regulator output voltage. ADJA regulates at 2V.
Connect ADJA to GND for nominal 12V output using internal feedback.
1
2
ON5
5V SMPS Enable Input. The 5V SMPS is enabled if ON5 is greater than the SMPS on
level and disabled if ON5 is less than the SMPS off level. If ON5 is connected to REF,
the 5V SMPS starts after the 3.3V SMPS reaches regulation (delay start). Drive ON5
below the clear fault level to reset the fault latches.
2
3
ON3
3.3V SMPS Enable Input. The 3.3V SMPS is enabled if ON3 is greater than the SMPS
on level and disabled if ON3 is less than the SMPS off level. If ON3 is connected to
REF, the 3.3V SMPS starts after the 5V SMPS reaches regulation (delay start). Drive
ON3 below the clear fault level to reset the fault latches.
—
4
ONA
LDOA Enable Input. When ONA is low, LDOA is high impedance and the secondary
winding control is off. When ONA is high, LDOA is on. Connect to LDO3, LDO5,
CSL3, CSL5, or other output for desired automatic startup sequencing.
3
5
FSEL
Frequency-Select Input. This three-level logic input sets the controller’s switching
frequency. Connect to GND, REF, or V
CC
to select the following typical switching
frequencies:
V
CC
= 500kHz, REF = 300kHz, GND = 200kHz
4
6
ILIM3
3.3V SMPS Peak Current-Limit Threshold Adjustment. The current-limit threshold
defaults to 75mV if ILIM3 is connected to V
CC
. In adjustable mode, the current-limit
threshold across CSH3 and CSL3 is precisely 1/10th the voltage seen at ILIM3 over a
500mV to 2.0V range. The logic threshold for switchover to the 75mV default value is
approximately V
CC
- 1V.
5
7
ILIM5
5V S M P S P eak C ur ent- Li m Thr eshol d The cur ent- m thr eshol d d efaul s to 75m V i
ILIM 5 i s connected to V
C C
. In ad ustab e m od e, the cur ent- m thr eshol d acr oss C S H 5
and C S L5 i s p eci sel y 1/10th the vol ag e seen at ILIM 5 over a 500m V to 2.0V r ang e. The
l og c thr eshol d for sw chover to the 75m V d efaul val ue i s ap p oxi m atel y V
C C
- 1V
6
8
REF
2.0V Reference Voltage Output. Bypass REF to analog ground with a 0.1μF or greater
ceramic capacitor. The reference can source up to 100μA for external loads. Loading
REF degrades output-voltage accuracy according to the REF load-regulation error.
The reference shuts down when
SHDN
is low.
7
9
GND
Analog Ground. Connect the backside pad to GND.
8
10
V
CC
Analog Supply Input. Connect to the system supply voltage (+4.5V to +5.5V) through
a series 20
resistor. Bypass V
CC
to analog ground with a 1μF or greater ceramic
capacitor.
9
11
PGDLY
Power-Good One-Shot Delay. Place a timing capacitor on PGDLY to delay PGOOD
going high. PGDLY has a 5μA pullup current and a 10
pulldown. The pulldown is
activated when power is not good. When power is good, the pulldown is shut off and
the 5μA pullup is activated. When PGDLY crosses REF, PGOOD is enabled.