M
High-Efficiency, 5x Output, Main Power-Supply
Controllers for Notebook Computers
32
______________________________________________________________________________________
The 40/60 optimal interleaved architecture of the
MAX1533A/MAX1537A allows the input voltage to go
as low as 8.3V before the duty cycles begin to overlap.
This offers improved efficiency over a regular 180
°
out-
of-phase architecture where the duty cycles begin to
overlap below 10V. Figure 10 shows the input-capacitor
RMS current vs. input voltage for an application that
requires 5V/5A and 3.3V/5A. This shows the improve-
ment of the 40/60 optimal interleaving over 50/50 inter-
leaving and in-phase operation.
For most applications, nontantalum chemistries (ceram-
ic, aluminum, or OS-CON) are preferred due to their
resistance to power-up surge currents typical of sys-
tems with a mechanical switch or connector in series
with the input. Choose a capacitor that has less than
10
°
C temperature rise at the RMS input current for opti-
mal reliability and lifetime.
Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N
H
) must be able to dissipate
the resistive losses plus the switching losses at both
V
IN(MIN)
and V
IN(MAX)
. Ideally, the losses at V
IN(MIN)
should be roughly equal to the losses at V
IN(MAX)
, with
lower losses in between. If the losses at V
IN(MIN)
are
significantly higher, consider increasing the size of N
H
.
Conversely, if the losses at V
IN(MAX)
are significantly
higher, consider reducing the size of N
H
. If V
IN
does
not vary over a wide range, maximum efficiency is
achieved by selecting a high-side MOSFET (N
H
) that
has conduction losses equal to the switching losses.
Choose a low-side MOSFET (N
L
) that has the lowest
possible on-resistance (R
DS(ON)
), comes in a moder-
ate-sized package (i.e., SO-8, DPAK, or D
2
PAK), and is
reasonably priced. Ensure that the MAX1533A/
MAX1537A DL_ gate driver can supply sufficient cur-
rent to support the gate charge and the current injected
into the parasitic drain-to-gate capacitor caused by the
high-side MOSFET turning on; otherwise, cross-
conduction problems may occur. Switching losses are
not an issue for the low-side MOSFET since it is a zero-
voltage switched device when used in the step-down
topology.
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
H
), the worst-
case power dissipation due to resistance occurs at
minimum input voltage:
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R
DS(ON)
required to stay within package power-dissi-
pation limits often limits how small the MOSFET can be.
The optimum occurs when the switching losses equal
the conduction (R
DS(ON)
) losses. High-side switching
losses do not become an issue until the input is greater
than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N
H
) due to switching losses is difficult, since
it must allow for difficult-to-quantify factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on N
H
:
=
(
PD N
Switching
V
C
f
I
H
IN MAX
(
RSS
SW LOAD
GATE
(
)
)
)
2
PD N
sistive
V
V
I
R
H
OUT
IN
LOAD
DS ON
(
(
Re
)
)
=
(
)
2
Figure 10. Input RMS Current
INPUT CAPACITOR RMS CURRENT
vs. INPUT VOLTAGE
V
IN
(V)
I
R
18
16
12
14
10
8
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
6
20
IN PHASE
5V/5A AND 3.3V/5A
50/50 INTERLEAVING
40/60 OPTIMAL
INTERLEAVING
INPUT RMS CURRENT FOR INTERLEAVED OPERATION
INPUT RMS CURRENT FOR SINGLE-PHASE OPERATION
(I
OUT5
- I
IN
)
2
(D
LX5
- D
OL
) + (I
OUT3
- I
IN
)
2
(D
LX3
- D
OL
) +
(I
OUT5
+ I
OUT3
- I
IN
)2 D
OL
+ I
IN2
(1 - D
LX5
- D
LX3
+ D
OL
)
V
OUT5
V
IN
V
IN
D
LX5
=
V
OUT
(V
IN
- V
OUT
)
V
IN
I
RMS
= I
LOAD
D
OL
= DUTY-CYCLE OVERLAP FRACTION
D
LX3
= V
OUT3
I
RMS
=