參數(shù)資料
型號(hào)： MAX1516
廠商： Maxim Integrated Products, Inc.
元件分類： DC/DC變換器
英文描述： TFT-LCD DC-DC Converters with Operational Amplifiers
中文描述： TFT-LCD DC-DC轉(zhuǎn)換器，帶有運(yùn)算放大器
文件頁(yè)數(shù)： 23/26頁(yè)
文件大?。?/td> 919K
代理商： MAX1516
M
TFT-LCD DC-DC Converters with
Operational Amplifiers
______________________________________________________________________________________
23
The transconductance amplifier regulates the output
voltage by controlling the pass transistor’s base cur-
rent. The total DC loop gain is approximately:
where V
T
is 26mV at room temperature, and I
BIAS
is the
current through the base-to-emitter resistor (R
BE
). For
the MAX1516/MAX1517/MAX1518, the bias currents for
both the gate-on and gate-off linear-regulator controllers
are 0.1mA. Therefore, the base-to-emitter resistor for
both linear regulators should be chosen to set 0.1mA
bias current:
V
mA
0 1
.
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capaci-
tor’s ESR generates a zero. For proper operation, use
the following equations to verify the linear regulator is
properly compensated:
1) First, determine the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
The unity-gain crossover of the linear regulator is:
f
CROSSOVER
= A
V_LR
f
POLE_LR
2) The pole created by the internal amplifier delay is
approximately 1MHz:
f
POLE_AMP
= 1MHz
3) Next, calculate the pole set by the transistor’s
input capacitance, the transistor’s input resistance,
and the base-to-emitter pullup resistor:
g
m
is the transconductance of the pass transistor,
and f
T
is the transition frequency. Both parameters
can be found in the transistor’s data sheet. Because
R
BE
is much greater than R
IN
, the above equation
can be simplified:
Substituting for C
IN
and R
IN
yields:
4) Next, calculate the pole set by the linear regula-
tor’s feedback resistance and the capacitance
between FB_ and AGND (including stray capaci-
tance):
where C
FB
is the capacitance between FB_ and
AGND, R
UPPER
is the upper resistor of the linear
regulator’s feedback divider, and R
LOWER
is the
lower resistor of the divider.
5) Next, calculate the zero caused by the output
capacitor’s ESR:
where R
ESR
is the equivalent series resistance of
C
OUT_LR
.
To ensure stability, choose C
OUT_LR
large enough so
the crossover occurs well before the poles and zero
calculated in steps 2 to 5. The poles in steps 3 and 4
generally occur at several megahertz, and using
ceramic capacitors ensures the ESR zero occurs at
several megahertz as well. Placing the crossover below
500kHz is sufficient to avoid the amplifier-delay pole
and generally works well, unless unusual component
choices or extra capacitances move one of the other
poles or the zero below 1MHz.
f
C
R
POLE ESR
OUT LR
ESR
_
_
=
×
×
1
2
π
f
C
R
(
R
POLE FB
FB
UPPER
LOWER
_
||
)
=
×
×
1
2
π
f
f
h
POLE IN
T
FE
_
=
f
C
R
POLE IN
IN
IN
_
=
×
×
1
2
π
where C
g
2
π
f
R
h
g
IN
m
T
IN
FE
m
=
=
,
,
f
C
R
(
R
POLE IN
IN
BE
IN
_
||
)
=
×
×
1
2
π
f
I
C
V
POLE LR
LOAD MAX
LR
OUT LR
OUT LR
_
(
)_
_
_
=
×
×
2
π
R
V
mA
k
BE
BE
=
=
≈
0 7
0 1
.
6 8
.
.
A
V
I
h
I
V
V LR
_
T
BIAS
LOAD LR
FE
REF
_
×
+
×
×
10
1
相關(guān)PDF資料
PDF描述
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