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參數(shù)資料
| 型號： | MAX14821EWA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC IO-LINK 25-WLP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 系列： | * |
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MAX14821
IO-Link Device Transceiver
15
Maxim Integrated
Pin/Bump Descriptions (continued)
PIN
NAME
FUNCTION
TQFN-EP
WLP
11
D5
TXQ
Transmit Level Input. The logic on the C/Q output is the inverse logic level of the signals on
the TXC and TXQ inputs. TXQ is ANDed with TXC. Drive TXQ high if not in use.
12
D4
TXC
Transmit Communication Input. The logic on the C/Q output is the inverse logic level of the
signals on the TXC and TXQ inputs. TXC is ANDed with TXQ. Drive TXC high if not in use.
13
E5
TXEN
Transmitter Enable. Drive TXEN high to enable the C/Q transmitter. TXEN is referenced to VL.
14
E4
RX
Receiver Output. RX is the inverse logic level of C/Q. RX is always high when the RxDis bit in
the CQConfig register is set to 1.
15
D3
WU
Active-Low Wake-Up Output. WU is a push-pull output referenced to VL. WU pulses low for
190Fs (typ) when a valid wake-up pulse is detected on the C/Q line.
16
E3
LO
Logic Input of the DO Output. LO is the logic input that drives DO. LO is referenced to VL.
17
E2
LI
Logic Output of the 24V DI Logic Input. LI is the inverse logic of DI. LI is referenced to VL.
18
D2
UV
Open-Drain Undervoltage Indicator Output. In case of an undervoltage, the UV open-drain
transistor is off.
19
E1
DI
24V Logic-Level Digital Input
20
C1, C2
GND
Ground
21
B1
C/Q
SIO/IO-Link Data Input/Output. Drive TXEN high to enable the C/Q driver. The logic on the
C/Q output is the inverse logic level of the signals on the TXC and TXQ inputs. RX is the logic
inverse of C/Q. The C/Q driver output level can be set by the TXC/TXQ inputs or programmed
by the Q bit. The level on C/Q can be read by the RX ouput or the QLvl bit.
22
D1
DO
24V Logic-Level Digital Output. DO is the inverse logic level of the LO input and can be digi-
tally controlled through the DIOConfig register.
23
A1
VCC
Power-Supply Input. Bypass VCC to GND with a 1FF ceramic capacitor.
24
B2
VP
Protected 24V Supply Output. VP is one diode drop below VCC. VP is reverse-polarity protect-
ed and can be used as a 24V protected supply to the sensor or actuator electronics.
—
EP
Exposed Pad (TQFN Only). Connect EP to GND.
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參數(shù)描述 |
|---|---|
| MAX14824ETG+ | 功能描述:輸入/輸出控制器接口集成電路 IO-Link Master Transceiver RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| MAX14824ETG+T | 功能描述:輸入/輸出控制器接口集成電路 IO-Link Master Transceiver RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| MAX14824EVKIT# | 功能描述:界面開發(fā)工具 MAX14824 EVAL KIT RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| MAX14824GTG+ | 功能描述:輸入/輸出控制器接口集成電路 3 1/2 Digit ADC w/Reference RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| MAX14824GTG+T | 功能描述:輸入/輸出控制器接口集成電路 Logic-Level Translator RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
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